drivers/gpu/drm/imagination/pvr_ccb.c

103

pvr_ccb_fini(struct pvr_ccb *pvr_ccb)

drivers/gpu/drm/imagination/pvr_ccb.c

105

pvr_fw_object_unmap_and_destroy(pvr_ccb->ccb_obj);

drivers/gpu/drm/imagination/pvr_ccb.c

106

pvr_fw_object_unmap_and_destroy(pvr_ccb->ctrl_obj);

drivers/gpu/drm/imagination/pvr_ccb.c

121

pvr_ccb_slot_available_locked(struct pvr_ccb *pvr_ccb, u32 *write_offset)

drivers/gpu/drm/imagination/pvr_ccb.c

123

struct rogue_fwif_ccb_ctl *ctrl = pvr_ccb->ctrl;

drivers/gpu/drm/imagination/pvr_ccb.c

126

lockdep_assert_held(&pvr_ccb->lock);

drivers/gpu/drm/imagination/pvr_ccb.c

238

struct pvr_ccb *pvr_ccb = &pvr_dev->kccb.ccb;

drivers/gpu/drm/imagination/pvr_ccb.c

239

struct rogue_fwif_ccb_ctl *ctrl = pvr_ccb->ctrl;

drivers/gpu/drm/imagination/pvr_ccb.c

244

lockdep_assert_held(&pvr_ccb->lock);

drivers/gpu/drm/imagination/pvr_ccb.c

266

struct pvr_ccb *pvr_ccb = &pvr_dev->kccb.ccb;

drivers/gpu/drm/imagination/pvr_ccb.c

267

struct rogue_fwif_kccb_cmd *kccb = pvr_ccb->ccb;

drivers/gpu/drm/imagination/pvr_ccb.c

268

struct rogue_fwif_ccb_ctl *ctrl = pvr_ccb->ctrl;

drivers/gpu/drm/imagination/pvr_ccb.c

274

mutex_lock(&pvr_ccb->lock);

drivers/gpu/drm/imagination/pvr_ccb.c

282

if (WARN_ON(!pvr_ccb_slot_available_locked(pvr_ccb, &new_write_offset)))

drivers/gpu/drm/imagination/pvr_ccb.c

30

struct pvr_ccb *pvr_ccb = priv;

drivers/gpu/drm/imagination/pvr_ccb.c

302

mutex_unlock(&pvr_ccb->lock);

drivers/gpu/drm/imagination/pvr_ccb.c

34

ctrl->wrap_mask = pvr_ccb->num_cmds - 1;

drivers/gpu/drm/imagination/pvr_ccb.c

35

ctrl->cmd_size = pvr_ccb->cmd_size;

drivers/gpu/drm/imagination/pvr_ccb.c

50

pvr_ccb_init(struct pvr_device *pvr_dev, struct pvr_ccb *pvr_ccb,

drivers/gpu/drm/imagination/pvr_ccb.c

57

pvr_ccb->num_cmds = num_cmds;

drivers/gpu/drm/imagination/pvr_ccb.c

58

pvr_ccb->cmd_size = cmd_size;

drivers/gpu/drm/imagination/pvr_ccb.c

60

err = drmm_mutex_init(from_pvr_device(pvr_dev), &pvr_ccb->lock);

drivers/gpu/drm/imagination/pvr_ccb.c

68

pvr_ccb->ctrl = pvr_fw_object_create_and_map(pvr_dev, sizeof(*pvr_ccb->ctrl),

drivers/gpu/drm/imagination/pvr_ccb.c

70

ccb_ctrl_init, pvr_ccb, &pvr_ccb->ctrl_obj);

drivers/gpu/drm/imagination/pvr_ccb.c

71

if (IS_ERR(pvr_ccb->ctrl))

drivers/gpu/drm/imagination/pvr_ccb.c

72

return PTR_ERR(pvr_ccb->ctrl);

drivers/gpu/drm/imagination/pvr_ccb.c

74

pvr_ccb->ccb = pvr_fw_object_create_and_map(pvr_dev, ccb_size,

drivers/gpu/drm/imagination/pvr_ccb.c

76

NULL, NULL, &pvr_ccb->ccb_obj);

drivers/gpu/drm/imagination/pvr_ccb.c

77

if (IS_ERR(pvr_ccb->ccb)) {

drivers/gpu/drm/imagination/pvr_ccb.c

78

err = PTR_ERR(pvr_ccb->ccb);

drivers/gpu/drm/imagination/pvr_ccb.c

82

pvr_fw_object_get_fw_addr(pvr_ccb->ctrl_obj, &pvr_ccb->ctrl_fw_addr);

drivers/gpu/drm/imagination/pvr_ccb.c

83

pvr_fw_object_get_fw_addr(pvr_ccb->ccb_obj, &pvr_ccb->ccb_fw_addr);

drivers/gpu/drm/imagination/pvr_ccb.c

85

WRITE_ONCE(pvr_ccb->ctrl->write_offset, 0);

drivers/gpu/drm/imagination/pvr_ccb.c

86

WRITE_ONCE(pvr_ccb->ctrl->read_offset, 0);

drivers/gpu/drm/imagination/pvr_ccb.c

87

WRITE_ONCE(pvr_ccb->ctrl->wrap_mask, num_cmds - 1);

drivers/gpu/drm/imagination/pvr_ccb.c

88

WRITE_ONCE(pvr_ccb->ctrl->cmd_size, cmd_size);

drivers/gpu/drm/imagination/pvr_ccb.c

93

pvr_fw_object_unmap_and_destroy(pvr_ccb->ctrl_obj);

drivers/gpu/drm/imagination/pvr_ccb.h

49

void pvr_ccb_fini(struct pvr_ccb *ccb);

drivers/gpu/drm/imagination/pvr_device.h

180

struct pvr_ccb fwccb;

drivers/gpu/drm/imagination/pvr_device.h

266

struct pvr_ccb ccb;