qmc_write32
qmc_write32(chan->s_param + QMC_SPE_RPACK, chan->qmc->data->rpack);
qmc_write32(chan->s_param + QMC_SPE_ZDSTATE,
qmc_write32(chan->s_param + QMC_SPE_RSTATE, chan->qmc->data->rstate);
qmc_write32(chan->s_param + QMC_SPE_TSTATE, chan->qmc->data->tstate);
qmc_write32(chan->s_param + QMC_SPE_ZISTATE, chan->qmc->data->zistate);
qmc_write32(chan->s_param + QMC_SPE_TSTATE, chan->qmc->data->tstate);
qmc_write32(chan->s_param + QMC_SPE_RSTATE, chan->qmc->data->rstate);
qmc_write32(chan->s_param + QMC_SPE_ZISTATE, chan->qmc->data->zistate);
qmc_write32(chan->s_param + QMC_SPE_RPACK, chan->qmc->data->rpack);
qmc_write32(chan->s_param + QMC_SPE_ZDSTATE, chan->qmc->data->zdstate_transp);
qmc_write32(chan->s_param + QMC_SPE_ZDSTATE, chan->qmc->data->zdstate_hdlc);
qmc_write32(chan->s_param + QMC_SPE_RPACK,
qmc_write32(chan->s_param + QMC_SPE_ZDSTATE,
qmc_write32(chan->s_param + QMC_SPE_RSTATE,
qmc_write32(qmc->scc_regs + SCC_GSMRH, val);
qmc_write32(qmc->scc_regs + SCC_GSMRL, SCC_CPM1_GSMRL_MODE_QMC);
qmc_write32(qmc->scc_regs + SCC_GSMRH, val);
qmc_write32(qmc->scc_regs + SCC_GSMRL, SCC_QE_GSMRL_MODE_QMC);
qmc_write32(qmc->scc_pram + QMC_GBL_MCBASE, qmc->bd_dma_addr);
qmc_write32(qmc->scc_pram + QMC_GBL_INTBASE, qmc->int_dma_addr);
qmc_write32(qmc->scc_pram + QMC_GBL_INTPTR, qmc->int_dma_addr);
qmc_write32(qmc->scc_pram + QMC_GBL_C_MASK32, 0xDEBB20E3);
qmc_write32(qmc->scc_pram + QMC_QE_GBL_GCSBASE, qmc->dpram_offset);
qmc_write32(addr, qmc_read32(addr) | set);
qmc_write32(&bd->cbd_bufaddr, addr);
qmc_write32(&bd->cbd_bufaddr, addr);
qmc_write32(chan->s_param + QMC_SPE_RPACK, chan->qmc->data->rpack);
qmc_write32(chan->s_param + QMC_SPE_ZDSTATE,
qmc_write32(chan->s_param + QMC_SPE_RSTATE, chan->qmc->data->rstate);