ql_write_page0_reg
ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value);
ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value);
ql_write_page0_reg(qdev,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
ql_write_page0_reg(qdev, &port_regs->tcpMaxWindow, value);
ql_write_page0_reg(qdev, &port_regs->ExternalHWConfig, value);
ql_write_page0_reg(qdev, &port_regs->InternalChipConfig,
ql_write_page0_reg(qdev,
ql_write_page0_reg(qdev,
ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg,
ql_write_page0_reg(qdev, &port_regs->macAddrDataReg,
ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg,
ql_write_page0_reg(qdev, &port_regs->macAddrDataReg,
ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg,
ql_write_page0_reg(qdev, &port_regs->ipAddrIndexReg,
ql_write_page0_reg(qdev, &port_regs->ipAddrDataReg, 0);
ql_write_page0_reg(qdev, &port_regs->ipAddrIndexReg,
ql_write_page0_reg(qdev, &port_regs->ipAddrDataReg, 0);
ql_write_page0_reg(qdev,
ql_write_page0_reg(qdev, &port_regs->functionControl,
ql_write_page0_reg(qdev, &port_regs->portControl,
ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg,
ql_write_page0_reg(qdev, &port_regs->macAddrDataReg,
ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg,
ql_write_page0_reg(qdev, &port_regs->macAddrDataReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtDataReg, value);
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtDataReg, value);
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,
ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg,