drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2403

struct hubp *hubp = params->program_surface_config_params.hubp;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2404

enum surface_pixel_format format = params->program_surface_config_params.format;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2405

struct dc_tiling_info *tiling_info = params->program_surface_config_params.tiling_info;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2406

struct plane_size size = params->program_surface_config_params.plane_size;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2407

enum dc_rotation_angle rotation = params->program_surface_config_params.rotation;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2408

struct dc_plane_dcc_param *dcc = params->program_surface_config_params.dcc;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2409

bool horizontal_mirror = params->program_surface_config_params.horizontal_mirror;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2410

int compat_level = params->program_surface_config_params.compat_level;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4606

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.hubp = hubp;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4607

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.format = format;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4608

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.tiling_info = tiling_info;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4609

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.plane_size = plane_size;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4610

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.rotation = rotation;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4611

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.dcc = dcc;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4612

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.horizontal_mirror = horizontal_mirror;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4613

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.compat_level = compat_level;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

930

struct program_surface_config_params program_surface_config_params;