qcom_smem_state_update_bits
qcom_smem_state_update_bits(smp2p->valid_state, mask, value);
qcom_smem_state_update_bits(smp2p->valid_state, mask, 0);
qcom_smem_state_update_bits(smp2p->enabled_state, mask, 0);
qcom_smem_state_update_bits(smp2p->enabled_state, mask, value);
ret = qcom_smem_state_update_bits(ab_ahb->smp2p_info.smem_state,
ret = qcom_smem_state_update_bits(ab_ahb->smp2p_info.smem_state,
ret = qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit),
qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit), 0);
qcom_smem_state_update_bits(ab_ahb->stop_state, BIT(ab_ahb->stop_bit),
qcom_smem_state_update_bits(ab_ahb->stop_state, BIT(ab_ahb->stop_bit), 0);
ret = qcom_smem_state_update_bits(wcn->tx_enable_state,
qcom_smem_state_update_bits(wcn->tx_rings_empty_state,
qcom_smem_state_update_bits(dmux->pc_ack, dmux->pc_ack_mask,
qcom_smem_state_update_bits(dmux->pc, dmux->pc_mask,
qcom_smem_state_update_bits(q6v5->state,
qcom_smem_state_update_bits(q6v5->state, BIT(q6v5->stop_bit), 0);
qcom_smem_state_update_bits(q6v5->state,
qcom_smem_state_update_bits(wcnss->state,
qcom_smem_state_update_bits(wcnss->state,
EXPORT_SYMBOL_GPL(qcom_smem_state_update_bits);
int qcom_smem_state_update_bits(struct qcom_smem_state *state, u32 mask, u32 value);