arch/arm/mach-omap2/clkt2xxx_dpllcore.c

124

omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);

arch/arm/mach-omap2/clkt2xxx_dpllcore.c

147

tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL_X2;

arch/arm/mach-omap2/clkt2xxx_dpllcore.c

149

done_rate = CORE_CLK_SRC_DPLL_X2;

arch/arm/mach-omap2/clkt2xxx_dpllcore.c

165

omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);

arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c

132

omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);

arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c

140

CORE_CLK_SRC_DPLL_X2)

arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c

141

done_rate = CORE_CLK_SRC_DPLL_X2;

arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c

152

omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);

arch/arm/mach-omap2/sdrc2xxx.c

38

static u32 curr_perf_level = CORE_CLK_SRC_DPLL_X2;

arch/arm/mach-omap2/sdrc2xxx.c

88

else if (level == CORE_CLK_SRC_DPLL_X2)