CORESIGHT_UNLOCK
ARM_DBG_WRITE(c1, c0, 4, ~CORESIGHT_UNLOCK);
WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);
WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);
WREG32(mmPSOC_ETR_LAR, CORESIGHT_UNLOCK);
WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);
WREG32(base_reg + mmCORESIGHT_UNLOCK_REGISTER_OFFSET, CORESIGHT_UNLOCK);
WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);
WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);
WREG32(mmPSOC_ETR_LAR, CORESIGHT_UNLOCK);
WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);
writel_relaxed(CORESIGHT_UNLOCK, addr + CORESIGHT_LAR);