drivers/gpu/drm/imagination/pvr_ccb.c

102

pvr_ccb_fini(struct pvr_ccb *pvr_ccb)

drivers/gpu/drm/imagination/pvr_ccb.c

104

pvr_fw_object_unmap_and_destroy(pvr_ccb->ccb_obj);

drivers/gpu/drm/imagination/pvr_ccb.c

105

pvr_fw_object_unmap_and_destroy(pvr_ccb->ctrl_obj);

drivers/gpu/drm/imagination/pvr_ccb.c

120

pvr_ccb_slot_available_locked(struct pvr_ccb *pvr_ccb, u32 *write_offset)

drivers/gpu/drm/imagination/pvr_ccb.c

122

struct rogue_fwif_ccb_ctl *ctrl = pvr_ccb->ctrl;

drivers/gpu/drm/imagination/pvr_ccb.c

125

lockdep_assert_held(&pvr_ccb->lock);

drivers/gpu/drm/imagination/pvr_ccb.c

217

struct pvr_ccb *pvr_ccb = &pvr_dev->kccb.ccb;

drivers/gpu/drm/imagination/pvr_ccb.c

218

struct rogue_fwif_ccb_ctl *ctrl = pvr_ccb->ctrl;

drivers/gpu/drm/imagination/pvr_ccb.c

223

lockdep_assert_held(&pvr_ccb->lock);

drivers/gpu/drm/imagination/pvr_ccb.c

245

struct pvr_ccb *pvr_ccb = &pvr_dev->kccb.ccb;

drivers/gpu/drm/imagination/pvr_ccb.c

246

struct rogue_fwif_kccb_cmd *kccb = pvr_ccb->ccb;

drivers/gpu/drm/imagination/pvr_ccb.c

247

struct rogue_fwif_ccb_ctl *ctrl = pvr_ccb->ctrl;

drivers/gpu/drm/imagination/pvr_ccb.c

253

mutex_lock(&pvr_ccb->lock);

drivers/gpu/drm/imagination/pvr_ccb.c

261

if (WARN_ON(!pvr_ccb_slot_available_locked(pvr_ccb, &new_write_offset)))

drivers/gpu/drm/imagination/pvr_ccb.c

281

mutex_unlock(&pvr_ccb->lock);

drivers/gpu/drm/imagination/pvr_ccb.c

29

struct pvr_ccb *pvr_ccb = priv;

drivers/gpu/drm/imagination/pvr_ccb.c

33

ctrl->wrap_mask = pvr_ccb->num_cmds - 1;

drivers/gpu/drm/imagination/pvr_ccb.c

34

ctrl->cmd_size = pvr_ccb->cmd_size;

drivers/gpu/drm/imagination/pvr_ccb.c

49

pvr_ccb_init(struct pvr_device *pvr_dev, struct pvr_ccb *pvr_ccb,

drivers/gpu/drm/imagination/pvr_ccb.c

56

pvr_ccb->num_cmds = num_cmds;

drivers/gpu/drm/imagination/pvr_ccb.c

57

pvr_ccb->cmd_size = cmd_size;

drivers/gpu/drm/imagination/pvr_ccb.c

59

err = drmm_mutex_init(from_pvr_device(pvr_dev), &pvr_ccb->lock);

drivers/gpu/drm/imagination/pvr_ccb.c

67

pvr_ccb->ctrl = pvr_fw_object_create_and_map(pvr_dev, sizeof(*pvr_ccb->ctrl),

drivers/gpu/drm/imagination/pvr_ccb.c

69

ccb_ctrl_init, pvr_ccb, &pvr_ccb->ctrl_obj);

drivers/gpu/drm/imagination/pvr_ccb.c

70

if (IS_ERR(pvr_ccb->ctrl))

drivers/gpu/drm/imagination/pvr_ccb.c

71

return PTR_ERR(pvr_ccb->ctrl);

drivers/gpu/drm/imagination/pvr_ccb.c

73

pvr_ccb->ccb = pvr_fw_object_create_and_map(pvr_dev, ccb_size,

drivers/gpu/drm/imagination/pvr_ccb.c

75

NULL, NULL, &pvr_ccb->ccb_obj);

drivers/gpu/drm/imagination/pvr_ccb.c

76

if (IS_ERR(pvr_ccb->ccb)) {

drivers/gpu/drm/imagination/pvr_ccb.c

77

err = PTR_ERR(pvr_ccb->ccb);

drivers/gpu/drm/imagination/pvr_ccb.c

81

pvr_fw_object_get_fw_addr(pvr_ccb->ctrl_obj, &pvr_ccb->ctrl_fw_addr);

drivers/gpu/drm/imagination/pvr_ccb.c

82

pvr_fw_object_get_fw_addr(pvr_ccb->ccb_obj, &pvr_ccb->ccb_fw_addr);

drivers/gpu/drm/imagination/pvr_ccb.c

84

WRITE_ONCE(pvr_ccb->ctrl->write_offset, 0);

drivers/gpu/drm/imagination/pvr_ccb.c

85

WRITE_ONCE(pvr_ccb->ctrl->read_offset, 0);

drivers/gpu/drm/imagination/pvr_ccb.c

86

WRITE_ONCE(pvr_ccb->ctrl->wrap_mask, num_cmds - 1);

drivers/gpu/drm/imagination/pvr_ccb.c

87

WRITE_ONCE(pvr_ccb->ctrl->cmd_size, cmd_size);

drivers/gpu/drm/imagination/pvr_ccb.c

92

pvr_fw_object_unmap_and_destroy(pvr_ccb->ctrl_obj);

drivers/gpu/drm/imagination/pvr_ccb.h

49

void pvr_ccb_fini(struct pvr_ccb *ccb);

drivers/gpu/drm/imagination/pvr_device.h

182

struct pvr_ccb fwccb;

drivers/gpu/drm/imagination/pvr_device.h

268

struct pvr_ccb ccb;