pt_desc
vmx->pt_desc.guest.ctl = 0;
!(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN);
rdmsrq(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl);
if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) {
pt_save_msr(&vmx->pt_desc.host, vmx->pt_desc.num_address_ranges);
pt_load_msr(&vmx->pt_desc.guest, vmx->pt_desc.num_address_ranges);
if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) {
pt_save_msr(&vmx->pt_desc.guest, vmx->pt_desc.num_address_ranges);
pt_load_msr(&vmx->pt_desc.host, vmx->pt_desc.num_address_ranges);
if (vmx->pt_desc.host.ctl)
wrmsrq(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl);
if (data & vmx->pt_desc.ctl_bitmask)
if ((vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) &&
data != vmx->pt_desc.guest.ctl)
!intel_pt_validate_cap(vmx->pt_desc.caps,
value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc_periods);
if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc) &&
value = intel_pt_validate_cap(vmx->pt_desc.caps,
if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) &&
value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_periods);
if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) &&
if ((value && (vmx->pt_desc.num_address_ranges < 1)) || (value > 2))
if ((value && (vmx->pt_desc.num_address_ranges < 2)) || (value > 2))
if ((value && (vmx->pt_desc.num_address_ranges < 3)) || (value > 2))
if ((value && (vmx->pt_desc.num_address_ranges < 4)) || (value > 2))
msr_info->data = vmx->pt_desc.guest.ctl;
msr_info->data = vmx->pt_desc.guest.status;
!intel_pt_validate_cap(vmx->pt_desc.caps,
msr_info->data = vmx->pt_desc.guest.cr3_match;
(!intel_pt_validate_cap(vmx->pt_desc.caps,
!intel_pt_validate_cap(vmx->pt_desc.caps,
msr_info->data = vmx->pt_desc.guest.output_base;
(!intel_pt_validate_cap(vmx->pt_desc.caps,
!intel_pt_validate_cap(vmx->pt_desc.caps,
msr_info->data = vmx->pt_desc.guest.output_mask;
(index >= 2 * vmx->pt_desc.num_address_ranges))
msr_info->data = vmx->pt_desc.guest.addr_b[index / 2];
msr_info->data = vmx->pt_desc.guest.addr_a[index / 2];
vmx->pt_desc.guest.ctl = data;
vmx->pt_desc.guest.status = data;
if (!intel_pt_validate_cap(vmx->pt_desc.caps,
vmx->pt_desc.guest.cr3_match = data;
if (!intel_pt_validate_cap(vmx->pt_desc.caps,
!intel_pt_validate_cap(vmx->pt_desc.caps,
vmx->pt_desc.guest.output_base = data;
if (!intel_pt_validate_cap(vmx->pt_desc.caps,
!intel_pt_validate_cap(vmx->pt_desc.caps,
vmx->pt_desc.guest.output_mask = data;
if (index >= 2 * vmx->pt_desc.num_address_ranges)
vmx->pt_desc.guest.addr_b[index / 2] = data;
vmx->pt_desc.guest.addr_a[index / 2] = data;
bool flag = !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN);
for (i = 0; i < vmx->pt_desc.num_address_ranges; i++) {
memset(&vmx->pt_desc, 0, sizeof(vmx->pt_desc));
vmx->pt_desc.guest.output_mask = 0x7F;
vmx->pt_desc.caps[CPUID_EAX + i*PT_CPUID_REGS_NUM] = best->eax;
vmx->pt_desc.caps[CPUID_EBX + i*PT_CPUID_REGS_NUM] = best->ebx;
vmx->pt_desc.caps[CPUID_ECX + i*PT_CPUID_REGS_NUM] = best->ecx;
vmx->pt_desc.caps[CPUID_EDX + i*PT_CPUID_REGS_NUM] = best->edx;
vmx->pt_desc.num_address_ranges = intel_pt_validate_cap(vmx->pt_desc.caps,
vmx->pt_desc.ctl_bitmask = ~(RTIT_CTL_TRACEEN | RTIT_CTL_OS |
if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_cr3_filtering))
vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_CR3EN;
if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc))
vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_CYCLEACC |
if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc))
vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_MTC_EN |
if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_ptwrite))
vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_FUP_ON_PTW |
if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_power_event_trace))
vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_PWR_EVT_EN;
if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_topa_output))
vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_TOPA;
if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_output_subsys))
vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_FABRIC_EN;
for (i = 0; i < vmx->pt_desc.num_address_ranges; i++)
vmx->pt_desc.ctl_bitmask &= ~(0xfULL << (32 + i * 4));
struct pt_desc pt_desc;