drivers/gpu/drm/gma500/psb_intel_sdvo.c
1012
in_out.in0 = psb_intel_sdvo->attached_output;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1015
psb_intel_sdvo_set_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1020
if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1021
psb_intel_sdvo->attached_output))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1027
if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1028
input_dtd = psb_intel_sdvo->input_dtd;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1031
if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1032
psb_intel_sdvo->attached_output))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1036
(void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1040
if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1043
if (psb_intel_sdvo->has_hdmi_monitor) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1044
psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1045
psb_intel_sdvo_set_colorimetry(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1047
psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1049
psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1051
if (psb_intel_sdvo->is_tv &&
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1052
!psb_intel_sdvo_set_tv_format(psb_intel_sdvo))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1055
(void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1057
switch (psb_intel_sdvo->pixel_multiplier) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1063
if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1068
sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1070
sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1072
switch (psb_intel_sdvo->sdvo_reg) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1084
if (psb_intel_sdvo->has_hdmi_audio)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1093
psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1099
struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1116
psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1118
psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1122
temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1124
temp = REG_READ(psb_intel_sdvo->sdvo_reg);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1127
psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1135
temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1137
temp = REG_READ(psb_intel_sdvo->sdvo_reg);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1140
psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1145
status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1152
"sync\n", SDVO_NAME(psb_intel_sdvo));
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1156
psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1157
psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1165
struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1170
if (psb_intel_sdvo->pixel_clock_min > mode->clock)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1173
if (psb_intel_sdvo->pixel_clock_max < mode->clock)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1176
if (psb_intel_sdvo->is_lvds) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1177
if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1180
if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1187
static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1190
if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1225
psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1228
int caps = psb_intel_sdvo->caps.output_flags & 0xf;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1235
struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1252
struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1258
if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1259
u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1265
for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1266
psb_intel_sdvo->ddc_bus = ddc;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1276
psb_intel_sdvo->ddc_bus = saved_ddc;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1291
if (psb_intel_sdvo->is_hdmi) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1292
psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1293
psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1303
psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1313
struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1317
if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1322
if (psb_intel_sdvo->caps.output_flags &
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1326
if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1336
psb_intel_sdvo->attached_output = response;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1338
psb_intel_sdvo->has_hdmi_monitor = false;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1339
psb_intel_sdvo->has_hdmi_audio = false;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1364
psb_intel_sdvo->is_tv = false;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1365
psb_intel_sdvo->is_lvds = false;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1366
psb_intel_sdvo->base.needs_tv_clock = false;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1369
psb_intel_sdvo->is_tv = true;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1370
psb_intel_sdvo->base.needs_tv_clock = true;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1373
psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1476
struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1484
format_map = 1 << psb_intel_sdvo->tv_format_index;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1488
if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1492
if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1496
if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1511
struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1520
psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1539
psb_intel_sdvo->sdvo_lvds_fixed_mode =
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1542
drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1545
psb_intel_sdvo->is_lvds = true;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1576
struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1580
if (!psb_intel_sdvo->is_hdmi)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1595
struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1620
if (has_audio == psb_intel_sdvo->has_hdmi_audio)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1623
psb_intel_sdvo->has_hdmi_audio = has_audio;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1628
if (val == !!psb_intel_sdvo->color_range)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1631
psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1648
if (psb_intel_sdvo->tv_format_index ==
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1652
psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val];
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1723
if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1728
if (psb_intel_sdvo->base.base.crtc) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1729
struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1742
struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1751
struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1787
struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1789
if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1791
psb_intel_sdvo->sdvo_lvds_fixed_mode);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1793
i2c_del_adapter(&psb_intel_sdvo->ddc);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1802
psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1854
struct psb_intel_sdvo *sdvo, u32 reg)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1871
struct psb_intel_sdvo *sdvo, u32 reg)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1897
psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1899
return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1941
struct psb_intel_sdvo *encoder)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1973
psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1975
struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1985
psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1988
psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
1998
if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2000
psb_intel_sdvo->is_hdmi = true;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2002
psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2005
psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2006
if (psb_intel_sdvo->is_hdmi)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
201
static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2013
psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2015
struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2029
psb_intel_sdvo->controlled_output |= type;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
203
return container_of(encoder, struct psb_intel_sdvo, base.base);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2032
psb_intel_sdvo->is_tv = true;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2033
psb_intel_sdvo->base.needs_tv_clock = true;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2034
psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2036
psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2038
if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2041
if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2052
psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2054
struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
206
static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2070
psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2073
psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2077
psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2081
psb_intel_sdvo);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2086
psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2088
struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
209
struct psb_intel_sdvo, base);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2103
psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2106
psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2110
psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2113
psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2114
if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2125
psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2127
psb_intel_sdvo->is_tv = false;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2128
psb_intel_sdvo->base.needs_tv_clock = false;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2129
psb_intel_sdvo->is_lvds = false;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2134
if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2138
if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2143
if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2147
if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2151
if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2155
if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2159
if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2163
if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2169
psb_intel_sdvo->controlled_output = 0;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2170
memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2172
SDVO_NAME(psb_intel_sdvo),
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2176
psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
218
psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2181
static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2185
struct drm_device *dev = psb_intel_sdvo->base.base.dev;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2189
if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2193
if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
220
psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2220
psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0];
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2229
if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2230
!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
drivers/gpu/drm/gma500/psb_intel_sdvo.c
224
psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2246
psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2250
struct drm_device *dev = psb_intel_sdvo->base.base.dev;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2256
if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2261
if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2292
if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2297
if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
232
static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
234
struct drm_device *dev = psb_intel_sdvo->base.base.dev;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2341
if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2361
psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2365
struct drm_device *dev = psb_intel_sdvo->base.base.dev;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2375
static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2386
psb_intel_sdvo_get_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2395
return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2397
return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
240
if (psb_intel_sdvo->sdvo_reg == SDVOB)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2406
struct psb_intel_sdvo *sdvo = adapter->algo_data;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2416
struct psb_intel_sdvo *sdvo = adapter->algo_data;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2426
psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2442
struct psb_intel_sdvo *psb_intel_sdvo;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2445
psb_intel_sdvo = kzalloc_obj(struct psb_intel_sdvo);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2446
if (!psb_intel_sdvo)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2449
psb_intel_sdvo->sdvo_reg = sdvo_reg;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2450
psb_intel_sdvo->target_addr = psb_intel_sdvo_get_target_addr(dev, sdvo_reg) >> 1;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2451
psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2452
if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2453
kfree(psb_intel_sdvo);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2458
gma_encoder = &psb_intel_sdvo->base;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2467
if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2482
if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2485
if (psb_intel_sdvo_output_setup(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2486
psb_intel_sdvo->caps.output_flags) != true) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2492
psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2495
if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2498
if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2499
&psb_intel_sdvo->pixel_clock_min,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2500
&psb_intel_sdvo->pixel_clock_max))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2507
SDVO_NAME(psb_intel_sdvo),
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2508
psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2509
psb_intel_sdvo->caps.device_rev_id,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2510
psb_intel_sdvo->pixel_clock_min / 1000,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2511
psb_intel_sdvo->pixel_clock_max / 1000,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2512
(psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2513
(psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2515
psb_intel_sdvo->caps.output_flags &
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2517
psb_intel_sdvo->caps.output_flags &
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2523
i2c_del_adapter(&psb_intel_sdvo->ddc);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
2524
kfree(psb_intel_sdvo);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
259
static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
263
.addr = psb_intel_sdvo->target_addr,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
269
.addr = psb_intel_sdvo->target_addr,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
277
if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
406
static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
409
struct drm_device *dev = psb_intel_sdvo->base.base.dev;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
437
DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(psb_intel_sdvo), cmd, buffer);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
452
static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
464
psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
467
msgs[i].addr = psb_intel_sdvo->target_addr;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
474
msgs[i].addr = psb_intel_sdvo->target_addr;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
483
msgs[i+1].addr = psb_intel_sdvo->target_addr;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
488
msgs[i+2].addr = psb_intel_sdvo->target_addr;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
493
ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
507
static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
510
struct drm_device *dev = psb_intel_sdvo->base.base.dev;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
524
if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
532
if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
551
if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
561
DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(psb_intel_sdvo), buffer);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
566
SDVO_NAME(psb_intel_sdvo), buffer);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
580
static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
584
return psb_intel_sdvo_write_cmd(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
589
static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
591
if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
594
return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
598
psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
600
if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
603
return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
606
static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
609
return psb_intel_sdvo_set_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
620
static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
625
if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
634
static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
637
return psb_intel_sdvo_set_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
642
static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
662
return psb_intel_sdvo_set_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
666
static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
673
if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
684
static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
687
return psb_intel_sdvo_set_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
692
static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
695
return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
drivers/gpu/drm/gma500/psb_intel_sdvo.c
696
psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
drivers/gpu/drm/gma500/psb_intel_sdvo.c
699
static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
702
return psb_intel_sdvo_set_timing(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
706
static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
709
return psb_intel_sdvo_set_timing(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
714
psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
727
if (psb_intel_sdvo->is_lvds &&
drivers/gpu/drm/gma500/psb_intel_sdvo.c
728
(psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
drivers/gpu/drm/gma500/psb_intel_sdvo.c
729
psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
732
return psb_intel_sdvo_set_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
737
static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
742
return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
744
psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
748
static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
750
return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
835
static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
840
return psb_intel_sdvo_get_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
845
static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
848
return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
851
static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
854
return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
858
static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
887
static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
894
static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo)
drivers/gpu/drm/gma500/psb_intel_sdvo.c
899
format_map = 1 << psb_intel_sdvo->tv_format_index;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
904
return psb_intel_sdvo_set_value(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
910
psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
915
if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
916
psb_intel_sdvo->attached_output))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
920
if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
927
psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
932
if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
935
if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
941
if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
942
&psb_intel_sdvo->input_dtd))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
945
psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
955
struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
drivers/gpu/drm/gma500/psb_intel_sdvo.c
962
if (psb_intel_sdvo->is_tv) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
963
if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
966
(void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
969
} else if (psb_intel_sdvo->is_lvds) {
drivers/gpu/drm/gma500/psb_intel_sdvo.c
970
if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
971
psb_intel_sdvo->sdvo_lvds_fixed_mode))
drivers/gpu/drm/gma500/psb_intel_sdvo.c
974
(void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
drivers/gpu/drm/gma500/psb_intel_sdvo.c
982
psb_intel_sdvo->pixel_multiplier =
drivers/gpu/drm/gma500/psb_intel_sdvo.c
984
adjusted_mode->clock *= psb_intel_sdvo->pixel_multiplier;
drivers/gpu/drm/gma500/psb_intel_sdvo.c
996
struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);