drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2026

struct hubp *hubp = params->program_surface_config_params.hubp;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2027

enum surface_pixel_format format = params->program_surface_config_params.format;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2028

struct dc_tiling_info *tiling_info = params->program_surface_config_params.tiling_info;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2029

struct plane_size size = params->program_surface_config_params.plane_size;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2030

enum dc_rotation_angle rotation = params->program_surface_config_params.rotation;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2031

struct dc_plane_dcc_param *dcc = params->program_surface_config_params.dcc;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2032

bool horizontal_mirror = params->program_surface_config_params.horizontal_mirror;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2033

int compat_level = params->program_surface_config_params.compat_level;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3889

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.hubp = hubp;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3890

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.format = format;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3891

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.tiling_info = tiling_info;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3892

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.plane_size = plane_size;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3893

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.rotation = rotation;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3894

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.dcc = dcc;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3895

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.horizontal_mirror = horizontal_mirror;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3896

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.compat_level = compat_level;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

756

struct program_surface_config_params program_surface_config_params;