phy_reset
.phy_reset = usbhs_phy_reset,
phy_reset(mtk_dp->phy);
ret = phy_reset(dphy);
ret = phy_reset(dphy);
.phy_reset = mptsas_phy_reset,
return pdata->phy_if.phy_reset(pdata);
phy_if->phy_reset = xgbe_phy_reset;
int (*phy_reset)(struct xgbe_prv_data *);
struct gpio_desc *phy_reset;
phy_reset = devm_gpiod_get_optional(&pdev->dev, "phy-reset",
if (IS_ERR(phy_reset))
return dev_err_probe(&pdev->dev, PTR_ERR(phy_reset),
if (!phy_reset)
gpiod_set_value_cansleep(phy_reset, 0);
err = phy_reset(port->serdes);
if (phy_reset(dev, mii_control)) {
if (phy_reset(dev, bmcr)) {
if (phy_reset(dev, bmcr)) {
if (phy_reset(dev, bmcr)) {
struct reset_control *phy_reset;
bsp_priv->phy_reset = of_reset_control_get(plat->phy_node, NULL);
if (IS_ERR(bsp_priv->phy_reset)) {
bsp_priv->phy_reset = NULL;
reset_control_put(bsp_priv->phy_reset);
reset_control_put(bsp_priv->phy_reset);
if (priv->phy_reset) {
if (priv->phy_reset)
reset_control_assert(priv->phy_reset);
if (priv->phy_reset)
reset_control_deassert(priv->phy_reset);
if (priv->phy_reset)
reset_control_assert(priv->phy_reset);
reset_control_assert(priv->phy_reset);
reset_control_deassert(priv->phy_reset);
ret = phy_reset(ks_pcie->phy[i]);
ret = phy_reset(mp->phy);
ret = phy_reset(priv->analog);
reset_control_deassert(priv->phy_reset);
reset_control_assert(priv->phy_reset);
priv->phy_reset = devm_reset_control_get_optional(dev, "phy");
return PTR_ERR_OR_ZERO(priv->phy_reset);
reset_control_assert(priv->phy_reset);
struct reset_control *phy_reset;
ret = reset_control_assert(priv->phy_reset);
ret = reset_control_deassert(priv->phy_reset);
reset_control_assert(priv->phy_reset);
ret = reset_control_assert(priv->phy_reset);
priv->phy_reset = devm_reset_control_get_exclusive(dev, "phy");
if (IS_ERR(priv->phy_reset))
return PTR_ERR(priv->phy_reset);
struct reset_control *phy_reset;
EXPORT_SYMBOL_GPL(phy_reset);
struct reset_control *phy_reset;
ret = reset_control_assert(phy->phy_reset);
ret = reset_control_deassert(phy->phy_reset);
phy->phy_reset = devm_reset_control_get_optional_exclusive(dev, NULL);
if (IS_ERR(phy->phy_reset))
return PTR_ERR(phy->phy_reset);
reset_control_assert(qphy->phy_reset);
qphy->phy_reset = devm_reset_control_get_exclusive(dev, "phy");
if (IS_ERR(qphy->phy_reset)) {
return PTR_ERR(qphy->phy_reset);
struct reset_control *phy_reset;
ret = reset_control_deassert(qphy->phy_reset);
reset_control_assert(qphy->phy_reset);
qphy->phy_reset = devm_reset_control_get_by_index(&pdev->dev, 0);
if (IS_ERR(qphy->phy_reset)) {
return PTR_ERR(qphy->phy_reset);
struct reset_control *phy_reset;
ret = reset_control_assert(qphy->phy_reset);
ret = reset_control_deassert(qphy->phy_reset);
reset_control_assert(qphy->phy_reset);
reset_control_assert(qphy->phy_reset);
struct reset_control *phy_reset;
ret = reset_control_assert(hsphy->phy_reset);
ret = reset_control_deassert(hsphy->phy_reset);
reset_control_assert(hsphy->phy_reset);
hsphy->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, NULL);
if (IS_ERR(hsphy->phy_reset)) {
return PTR_ERR(hsphy->phy_reset);
ret = reset_control_assert(priv->phy_reset);
ret = reset_control_deassert(priv->phy_reset);
priv->phy_reset = devm_reset_control_get_exclusive(dev, "phy");
if (IS_ERR(priv->phy_reset))
return PTR_ERR(priv->phy_reset);
struct reset_control *phy_reset;
rphy->phy_reset = devm_reset_control_get_optional(dev, "phy");
if (IS_ERR(rphy->phy_reset))
return PTR_ERR(rphy->phy_reset);
struct reset_control *phy_reset;
ret = reset_control_assert(rphy->phy_reset);
ret = reset_control_deassert(rphy->phy_reset);
struct reset_control *phy_reset;
phy_reset = devm_reset_control_get_exclusive_deasserted(dev, "phy");
if (IS_ERR(phy_reset))
return PTR_ERR(phy_reset);
reset_control_assert(combophy->phy_reset);
reset_control_deassert(combophy->phy_reset);
reset_control_deassert(combophy->phy_reset);
combophy->phy_reset = devm_reset_control_get_exclusive(dev, "phy");
if (IS_ERR(combophy->phy_reset))
return dev_err_probe(dev, PTR_ERR(combophy->phy_reset),
struct reset_control *phy_reset;
.phy_reset = hpsa_sas_phy_reset,
.phy_reset = queue_phy_reset,
.phy_reset = mpi3mr_transport_phy_reset,
.phy_reset = _transport_phy_reset,
u32 phy_reset:1;
MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);
MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);
MVS_CHIP_DISP->phy_reset(mvi,
MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);
MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);
void (*phy_reset)(struct mvs_info *mvi, u32 phy_id, int hard);
SETUP_OPTIONAL_PHY_ATTRIBUTE_WRONLY(link_reset, phy_reset);
SETUP_OPTIONAL_PHY_ATTRIBUTE_WRONLY(hard_reset, phy_reset);
error = i->f->phy_reset(phy, hard_reset);
.phy_reset = pqi_sas_phy_reset,
phy_reset(cdns->usb3_phy);
ret = phy_reset(hsotg->phy);
error = phy_reset(kdwc->usb3_phy);
usbhs_platform_call(priv, phy_reset, pdev);
usbhs_platform_call(priv, phy_reset, pdev);
usbhs_platform_call(priv, phy_reset, pdev);
int phy_reset(struct phy *phy);
unsigned phy_reset:1;
unsigned phy_reset:1;
int (*phy_reset)(struct platform_device *pdev);
int (*phy_reset)(struct sas_phy *, int);