arch/m68k/ifpsp060/src/fpsp.S

18080

# if the addressing mode is post-increment or pre-decrement,

arch/mips/include/asm/octeon/cvmx-sriox-defs.h

1358

uint64_t post:8;

arch/mips/include/asm/octeon/cvmx-sriox-defs.h

1360

uint64_t post:8;

arch/mips/include/asm/octeon/cvmx-sriox-defs.h

1462

uint64_t post:8;

arch/mips/include/asm/octeon/cvmx-sriox-defs.h

1464

uint64_t post:8;

arch/x86/mm/mmio-mod.c

242

.post_handler = post,

drivers/accel/ivpu/ivpu_hw_ip.c

270

pwr_island_delay_set_50xx(struct ivpu_device *vdev, u32 post, u32 post1, u32 post2, u32 status)

drivers/accel/ivpu/ivpu_hw_ip.c

275

val = REG_SET_FLD_NUM(VPU_50XX_HOST_SS_AON_PWR_ISLAND_EN_POST_DLY, POST_DLY, post, val);

drivers/accel/ivpu/ivpu_hw_ip.c

681

u32 post, post1, post2, status;

drivers/accel/ivpu/ivpu_hw_ip.c

689

post = high ? 18 : 0;

drivers/accel/ivpu/ivpu_hw_ip.c

696

post = high ? 198 : 17;

drivers/accel/ivpu/ivpu_hw_ip.c

708

pwr_island_delay_set_50xx(vdev, post, post1, post2, status);

drivers/acpi/acpi_video.c

1084

video->flags.post = 1;

drivers/acpi/acpi_video.c

112

u8 post:1; /* can configure the head to */

drivers/acpi/acpi_video.c

2050

str_yes_no(video->flags.post));

drivers/clk/sophgo/clk-cv18xx-pll.c

290

unsigned long pre, div, post;

drivers/clk/sophgo/clk-cv18xx-pll.c

298

for_each_pll_limit_range(post, &limit->post_div) {

drivers/clk/sophgo/clk-cv18xx-pll.c

301

pre, div, post,

drivers/clk/sophgo/clk-cv18xx-pll.c

309

post_div_sel = post;

drivers/clk/sophgo/clk-cv18xx-pll.c

54

unsigned long pre, div, post;

drivers/clk/sophgo/clk-cv18xx-pll.c

60

for_each_pll_limit_range(post, &limit->post_div) {

drivers/clk/sophgo/clk-cv18xx-pll.c

61

tmp = ipll_calc_rate(prate, pre, div, post);

drivers/clk/sophgo/clk-cv18xx-pll.c

70

post_div_sel = post;

drivers/gpu/drm/i915/gt/gen2_engine_cs.c

145

int flush, int post)

drivers/gpu/drm/i915/gt/gen2_engine_cs.c

158

while (post--) {

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

2432

struct i915_request *post[2 * EXECLIST_MAX_PORTS];

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

2436

inactive = process_csb(engine, post);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

2437

GEM_BUG_ON(inactive - post > ARRAY_SIZE(post));

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

2482

post_process_csb(post, inactive);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3104

struct i915_request *post[2 * EXECLIST_MAX_PORTS];

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3108

inactive = reset_csb(engine, post);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3113

post_process_csb(post, inactive);

drivers/gpu/drm/i915/gt/intel_rps.c

483

int post = (vidfreq & 0x3000) >> 12;

drivers/gpu/drm/i915/gt/intel_rps.c

489

return div * 133333 / (pre << post);

drivers/gpu/drm/nouveau/include/nvif/chan.h

20

int (*post)(struct nvif_chan *, u32 gpptr, u32 pbptr);

drivers/gpu/drm/nouveau/include/nvkm/subdev/devinit.h

10

bool post;

drivers/gpu/drm/nouveau/nvif/chan.c

14

if (chan->func->gpfifo.post) {

drivers/gpu/drm/nouveau/nvif/chan.c

42

if (!chan->func->gpfifo.post)

drivers/gpu/drm/nouveau/nvif/chan.c

45

return chan->func->gpfifo.post(chan, gpptr, pbptr);

drivers/gpu/drm/nouveau/nvif/chan.c

64

if (chan->func->gpfifo.post)

drivers/gpu/drm/nouveau/nvif/chan906f.c

71

.gpfifo.post = nvif_chan906f_gpfifo_post,

drivers/gpu/drm/nouveau/nvif/chanc36f.c

57

.gpfifo.post = nvif_chan906f_gpfifo_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c

63

if (init && init->func->post)

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c

64

ret = init->func->post(init, init->post);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c

75

init->post = true;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c

89

init->post = init->force_post;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c

55

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c

54

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ga100.c

80

.post = tu102_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c

101

base->post = ((nvkm_rd32(device, 0x2240c) & BIT(1)) == 0);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c

108

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c

52

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c

115

gm200_devinit_preos(struct nv50_devinit *init, bool post)

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c

120

pmu_load(init, 0x01, post, NULL, NULL);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c

124

gm200_devinit_post(struct nvkm_devinit *base, bool post)

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c

141

ret = pmu_load(init, 0x04, post, &exec, &args);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c

148

if (post) {

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c

156

if (post) {

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c

164

if (post) {

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c

174

gm200_devinit_preos(init, post);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c

182

.post = gm200_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c

83

pmu_load(struct nv50_devinit *init, u8 type, bool post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c

94

if (!post || !subdev->device->pmu)

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c

139

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.c

69

.post = gm200_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c

55

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

414

if (!init->base.post) {

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

422

init->base.post = true;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

455

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c

133

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv10.c

103

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv1a.c

33

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv20.c

69

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

100

if (!base->post) {

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

103

base->post = true;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

109

if (!base->post) {

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

113

base->post = true;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

134

while (init->base.post && dcb_outp_parse(bios, i, &ver, &hdr, &outp)) {

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

165

.post = nv04_devinit_post,

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/priv.h

14

int (*post)(struct nvkm_devinit *, bool post);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/r535.c

43

rm->post = hw->post;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c

87

tu102_devinit_post(struct nvkm_devinit *init, bool post)

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c

95

.post = tu102_devinit_post,

drivers/iio/adc/ad7124.c

452

unsigned int post = 0;

drivers/iio/adc/ad7124.c

481

post = AD7124_FILTER_POST_FILTER_47dB;

drivers/iio/adc/ad7124.c

485

post = AD7124_FILTER_POST_FILTER_62dB;

drivers/iio/adc/ad7124.c

489

post = AD7124_FILTER_POST_FILTER_86dB;

drivers/iio/adc/ad7124.c

493

post = AD7124_FILTER_POST_FILTER_92dB;

drivers/iio/adc/ad7124.c

527

FIELD_PREP(AD7124_FILTER_POST_FILTER, post) |

drivers/infiniband/hw/hfi1/pcie.c

708

#define eq_value(pre, curr, post) \

drivers/infiniband/hw/hfi1/pcie.c

712

| (((u32)(post)) << \

drivers/infiniband/sw/rxe/rxe_comp.c

447

bool post;

drivers/infiniband/sw/rxe/rxe_comp.c

450

post = ((qp->sq_sig_type == IB_SIGNAL_ALL_WR) ||

drivers/infiniband/sw/rxe/rxe_comp.c

454

if (post)

drivers/infiniband/sw/rxe/rxe_comp.c

459

if (post)

drivers/irqchip/irq-gic-v3-its.c

1235

goto post; \

drivers/irqchip/irq-gic-v3-its.c

1241

post: \

drivers/md/dm-crypt.c

1083

.post = crypt_iv_lmk_post

drivers/md/dm-crypt.c

1092

.post = crypt_iv_tcw_post

drivers/md/dm-crypt.c

1110

.post = crypt_iv_elephant_post

drivers/md/dm-crypt.c

115

int (*post)(struct crypt_config *cc, u8 *iv,

drivers/md/dm-crypt.c

1378

if (!r && cc->iv_gen_ops && cc->iv_gen_ops->post)

drivers/md/dm-crypt.c

1379

r = cc->iv_gen_ops->post(cc, org_iv, dmreq);

drivers/md/dm-crypt.c

1455

if (!r && cc->iv_gen_ops && cc->iv_gen_ops->post)

drivers/md/dm-crypt.c

1456

r = cc->iv_gen_ops->post(cc, org_iv, dmreq);

drivers/md/dm-crypt.c

2219

if (!error && cc->iv_gen_ops && cc->iv_gen_ops->post)

drivers/md/dm-crypt.c

2220

error = cc->iv_gen_ops->post(cc, org_iv_of_dmreq(cc, dmreq), dmreq);

drivers/media/i2c/tc358746.c

407

u8 post = tc358746->pll_post_div;

drivers/media/i2c/tc358746.c

428

val = PLL_FRS(ilog2(post)) | RESETB | PLL_EN;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c

3623

#define WC_TX_FIR(post, main, pre) \

drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c

3624

((post << MDIO_WC_REG_TX_FIR_TAP_POST_TAP_OFFSET) | \

drivers/scsi/aacraid/rx.c

348

} * post;

drivers/scsi/aacraid/rx.c

359

post = dma_alloc_coherent(&dev->pdev->dev,

drivers/scsi/aacraid/rx.c

362

if (unlikely(post == NULL)) {

drivers/scsi/aacraid/rx.c

367

post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS);

drivers/scsi/aacraid/rx.c

368

post->Post_Address = cpu_to_le32(baddr);

drivers/scsi/aacraid/rx.c

373

post, paddr);

drivers/scsi/be2iscsi/be_cmds.c

1617

u32 loop, post, rdy = 0;

drivers/scsi/be2iscsi/be_cmds.c

1621

post = beiscsi_get_post_stage(phba);

drivers/scsi/be2iscsi/be_cmds.c

1622

if (post & POST_ERROR_BIT)

drivers/scsi/be2iscsi/be_cmds.c

1624

if ((post & POST_STAGE_MASK) == POST_STAGE_ARMFW_RDY) {

drivers/scsi/be2iscsi/be_cmds.c

1633

"BC_%d : FW not ready 0x%x\n", post);

drivers/scsi/be2iscsi/be_cmds.c

1847

u32 post, status;

drivers/scsi/be2iscsi/be_cmds.c

1850

post = beiscsi_get_post_stage(phba);

drivers/scsi/be2iscsi/be_cmds.c

1851

status = post & POST_STAGE_MASK;

drivers/scsi/be2iscsi/be_cmds.c

1856

"BC_%d : HBA error recoverable: 0x%x\n", post);

drivers/scsi/be2iscsi/be_cmds.c

1860

"BC_%d : HBA in UE: 0x%x\n", post);

drivers/scsi/elx/libefc_sli/sli4.c

5008

struct sli4_rqst_post_sgl_pages *post = NULL;

drivers/scsi/elx/libefc_sli/sli4.c

5012

post = sli_config_cmd_init(sli4, buf,

drivers/scsi/elx/libefc_sli/sli4.c

5014

if (!post)

drivers/scsi/elx/libefc_sli/sli4.c

5023

sli_cmd_fill_hdr(&post->hdr, SLI4_OPC_POST_SGL_PAGES, SLI4_SUBSYSTEM_FC,

drivers/scsi/elx/libefc_sli/sli4.c

5025

post->xri_start = cpu_to_le16(xri);

drivers/scsi/elx/libefc_sli/sli4.c

5026

post->xri_count = cpu_to_le16(xri_count);

drivers/scsi/elx/libefc_sli/sli4.c

5029

post->page_set[i].page0_low =

drivers/scsi/elx/libefc_sli/sli4.c

5031

post->page_set[i].page0_high =

drivers/scsi/elx/libefc_sli/sli4.c

5037

post->page_set[i].page1_low =

drivers/scsi/elx/libefc_sli/sli4.c

5039

post->page_set[i].page1_high =

drivers/scsi/initio.c

1125

(*scb->post) ((u8 *) host, (u8 *) scb);

drivers/scsi/initio.c

2540

cblk->post = i91uSCBPost; /* i91u's callback routine */

drivers/scsi/initio.c

954

(*tmp->post) ((u8 *) host, (u8 *) tmp);

drivers/scsi/initio.c

987

(*tmp->post) ((u8 *) host, (u8 *) tmp);

drivers/scsi/initio.h

384

void (*post) (u8 *, u8 *); /*4C POST routine */

drivers/scsi/ips.c

4508

uint32_t post;

drivers/scsi/ips.c

4516

post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);

drivers/scsi/ips.c

4519

if (post == 0)

drivers/spi/spi-imx.c

521

unsigned int pre, post;

drivers/spi/spi-imx.c

526

post = fls(fin) - fls(fspi);

drivers/spi/spi-imx.c

527

if (fin > fspi << post)

drivers/spi/spi-imx.c

528

post++;

drivers/spi/spi-imx.c

532

post = max(4U, post) - 4;

drivers/spi/spi-imx.c

533

if (unlikely(post > 0xf)) {

drivers/spi/spi-imx.c

539

pre = DIV_ROUND_UP(fin, fspi << post) - 1;

drivers/spi/spi-imx.c

542

__func__, fin, fspi, post, pre);

drivers/spi/spi-imx.c

545

*fres = (fin / (pre + 1)) >> post;

drivers/spi/spi-imx.c

548

(post << MX51_ECSPI_CTRL_POSTDIV_OFFSET);

drivers/tty/serial/8250/serial_cs.c

197

.post = quirk_post_ibm,

drivers/tty/serial/8250/serial_cs.c

670

if (info->quirk && info->quirk->post)

drivers/tty/serial/8250/serial_cs.c

671

if (info->quirk->post(link))

drivers/tty/serial/8250/serial_cs.c

78

int (*post)(struct pcmcia_device *);

drivers/usb/chipidea/usbmisc_imx.c

1176

.post = usbmisc_imx25_post,

drivers/usb/chipidea/usbmisc_imx.c

1286

if (usbmisc->ops->post)

drivers/usb/chipidea/usbmisc_imx.c

1287

ret = usbmisc->ops->post(data);

drivers/usb/chipidea/usbmisc_imx.c

175

int (*post)(struct imx_usbmisc_data *data);

drivers/video/fbdev/matrox/matroxfb_DAC1064.c

41

unsigned int *post)

drivers/video/fbdev/matrox/matroxfb_DAC1064.c

61

*post = p;

drivers/video/fbdev/matrox/matroxfb_Ti3026.c

286

int *feed, int *post)

drivers/video/fbdev/matrox/matroxfb_Ti3026.c

294

fvco >>= (*post = lpost);

drivers/video/fbdev/matrox/matroxfb_maven.c

227

unsigned int* in, unsigned int* feed, unsigned int* post,

drivers/video/fbdev/matrox/matroxfb_maven.c

283

*post = p;

drivers/video/fbdev/matrox/matroxfb_maven.c

294

dprintk(KERN_ERR "clk: %02X %02X %02X %d %d\n", *in, *feed, *post, fxtal, fwant);

drivers/video/fbdev/matrox/matroxfb_maven.c

300

unsigned int* in, unsigned int* feed, unsigned int* post,

drivers/video/fbdev/matrox/matroxfb_maven.c

317

*post = p;

drivers/video/fbdev/matrox/matroxfb_maven.c

322

unsigned int* in, unsigned int* feed, unsigned int* post) {

drivers/video/fbdev/matrox/matroxfb_maven.c

336

*post = p;

drivers/video/fbdev/matrox/matroxfb_misc.c

131

unsigned int* in, unsigned int* feed, unsigned int* post) {

drivers/video/fbdev/matrox/matroxfb_misc.c

180

*post = p;

drivers/video/fbdev/matrox/matroxfb_misc.c

187

dprintk(KERN_ERR "clk: %02X %02X %02X %d %d %d\n", *in, *feed, *post, fxtal, bestvco, fwant);

drivers/video/fbdev/matrox/matroxfb_misc.h

13

unsigned int *post)

drivers/video/fbdev/matrox/matroxfb_misc.h

15

return matroxfb_PLL_calcclock(&minfo->features.pll, freq, fmax, in, feed, post);

drivers/video/fbdev/matrox/matroxfb_misc.h

9

unsigned int* in, unsigned int* feed, unsigned int* post);

drivers/video/fbdev/pm3fb.c

151

int f, pre, post;

drivers/video/fbdev/pm3fb.c

158

for (post = 0; post < 5; post++) {

drivers/video/fbdev/pm3fb.c

159

freq = ((2*PM3_REF_CLOCK * f) >> post) / pre;

drivers/video/fbdev/pm3fb.c

167

*postscale = post;

fs/cachefiles/io.c

653

size_t off, pre, post, len = subreq->len;

fs/cachefiles/io.c

687

post = len & (CACHEFILES_DIO_BLOCK_SIZE - 1);

fs/cachefiles/io.c

688

if (post) {

fs/cachefiles/io.c

689

len -= post;

fs/cachefiles/io.c

692

netfs_write_subrequest_terminated(subreq, post);

fs/ocfs2/refcounttree.c

3590

struct ocfs2_post_refcount *post)

fs/ocfs2/refcounttree.c

3628

context->post_refcount = post;

fs/ocfs2/refcounttree.c

3652

struct ocfs2_post_refcount *post)

fs/ocfs2/refcounttree.c

3683

if (post)

fs/ocfs2/refcounttree.c

3684

credits += post->credits;

fs/ocfs2/refcounttree.c

3709

if (post && post->func) {

fs/ocfs2/refcounttree.c

3710

ret = post->func(inode, handle, post->para);

fs/ocfs2/refcounttree.h

76

struct ocfs2_post_refcount *post);

fs/ocfs2/refcounttree.h

94

struct ocfs2_post_refcount *post);

fs/overlayfs/namei.c

235

size_t prelen, const char *post,

fs/overlayfs/namei.c

243

bool last_element = !post[0];

fs/overlayfs/namei.c

335

err = ovl_check_redirect(&path, d, prelen, post);

fs/overlayfs/namei.c

36

size_t prelen, const char *post)

fs/overlayfs/namei.c

43

buf = ovl_get_redirect_xattr(ofs, path, prelen + strlen(post));

fs/overlayfs/namei.c

64

strcat(buf, post);

include/linux/pci.h

2154

static inline u8 pci_find_next_capability(struct pci_dev *dev, u8 post, int cap)

kernel/exit.c

134

static void __unhash_process(struct release_task_post *post, struct task_struct *p,

kernel/exit.c

141

detach_pid(post->pids, p, PIDTYPE_PID);

kernel/exit.c

145

detach_pid(post->pids, p, PIDTYPE_TGID);

kernel/exit.c

146

detach_pid(post->pids, p, PIDTYPE_PGID);

kernel/exit.c

147

detach_pid(post->pids, p, PIDTYPE_SID);

kernel/exit.c

159

static void __exit_signal(struct release_task_post *post, struct task_struct *tsk)

kernel/exit.c

212

__unhash_process(post, tsk, group_dead);

kernel/exit.c

246

struct release_task_post post;

kernel/exit.c

251

memset(&post, 0, sizeof(post));

kernel/exit.c

265

__exit_signal(&post, p);

kernel/exit.c

295

free_pids(post.pids);

net/ipv6/rpl.c

15

const void *post, unsigned char pfx)

net/ipv6/rpl.c

18

memcpy(&dst->s6_addr[pfx], post, IPV6_PFXTAIL_LEN(pfx));

sound/core/pcm_timer.c

21

unsigned long rate, mult, fsize, l, post;

sound/core/pcm_timer.c

37

post = 1;

sound/core/pcm_timer.c

40

post *= 2;

sound/core/pcm_timer.c

49

runtime->timer_resolution = (mult * fsize / rate) * post;

tools/perf/util/probe-finder.c

1635

goto post;

tools/perf/util/probe-finder.c

1642

goto post;

tools/perf/util/probe-finder.c

1680

post: