arch/mips/cavium-octeon/setup.c

610

#if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0

arch/mips/cavium-octeon/setup.c

627

CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE,

arch/mips/cavium-octeon/setup.c

628

CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE * 128);

arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h

33

ori v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE

arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h

73

dli v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE

arch/mips/include/asm/processor.h

205

#if defined(CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE) && \

arch/mips/include/asm/processor.h

206

CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0

arch/mips/include/asm/processor.h

208

unsigned long cvmseg[CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE]

arch/mips/include/asm/processor.h

268

#if defined(CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE) && \

arch/mips/include/asm/processor.h

269

CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0

arch/mips/kernel/asm-offsets.c

328

#if defined(CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE) && \

arch/mips/kernel/asm-offsets.c

329

CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0

arch/mips/kernel/octeon_switch.S

31

#if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0

arch/mips/mm/tlbex.c

124

#if defined(CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE) && \

arch/mips/mm/tlbex.c

125

CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0

arch/mips/mm/tlbex.c

137

return CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE * 128 - (8 * i) - 32768;

drivers/staging/octeon/ethernet-defines.h

30

#define USE_ASYNC_IOBDMA (CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0)