pmu_type
int pmu_type;
pmu_type = get_loongson3_pmu_type();
switch (pmu_type) {
int counters, irq, pmu_type;
pmu_type = get_loongson3_pmu_type();
switch (pmu_type) {
if (hweight64(pmu_attr->pmu_type) == 1)
if (!(x86_pmu.hybrid_pmu[i].pmu_type & pmu_attr->pmu_type))
if (x86_pmu.hybrid_pmu[i].pmu_type & pmu->pmu_type) {
(hybrid_pmu->pmu_type == hybrid_big) ? PERF_TYPE_RAW : -1);
return hybrid_pmu(event->pmu)->pmu_type == hybrid_big;
if (pmu->pmu_type == hybrid_big)
else if (pmu->pmu_type == hybrid_small)
if (pmu->pmu_type == hybrid_big)
if (pmu->pmu_type == hybrid_small)
if (pmu->pmu_type == hybrid_big)
else if (pmu->pmu_type == hybrid_small)
if (pmu->pmu_type == hybrid_tiny)
if (pmu->pmu_type == hybrid_tiny)
enum hybrid_pmu_type pmu_type = x86_pmu.hybrid_pmu[i].pmu_type;
if (cpu_type == INTEL_CPU_TYPE_CORE && pmu_type == hybrid_big)
if (x86_pmu.num_hybrid_pmus == 2 && pmu_type == hybrid_small)
if (native_id == INTEL_ATOM_SKT_NATIVE_ID && pmu_type == hybrid_small)
if (native_id == INTEL_ATOM_CMT_NATIVE_ID && pmu_type == hybrid_tiny)
return pmu->pmu_type & pmu_attr->pmu_type;
return (cpu >= 0) && (pmu->pmu_type & pmu_attr->pmu_type) ? attr->mode : 0;
if (pmu->pmu_type == hybrid_big)
pmu->pmu_type = intel_hybrid_pmu_type_map[bit].id;
if (pmu->pmu_type & hybrid_small_tiny) {
} else if (pmu->pmu_type & hybrid_big) {
hybrid_pmu(event->pmu)->pmu_type == hybrid_big);
if (pmu->pmu_type == hybrid_small)
if (pmu->pmu_type == hybrid_tiny)
if (pmu->pmu_type == hybrid_small)
.pmu_type = _pmu, \
.pmu_type = _pmu, \
enum hybrid_pmu_type pmu_type;
enum pmu_type type)
unsigned int pmu_type,
pmu_entry->pmu_perf_type = pmu_type;
u8 pmu_type;
pmu_type = apmt_node->type;
if (pmu_type >= ACPI_APMT_NODE_TYPE_COUNT) {
dev_err(dev, "unsupported PMU type-%u\n", pmu_type);
if (pmu_type == ACPI_APMT_NODE_TYPE_ACPI) {
arm_cspmu_type_str[pmu_type],
arm_cspmu_type_str[pmu_type],
atomic_fetch_inc(&pmu_idx[pmu_type]));
u64 pmu_type;
u64 pmu_type;
CLASS(idr_alloc, pmu_type)(&pmu_idr, NULL, max, 0, GFP_KERNEL);
if (pmu_type.id < 0)
return pmu_type.id;
WARN_ON(type >= 0 && pmu_type.id != type);
pmu->type = pmu_type.id;
take_idr_id(pmu_type);
const char *pmu_name, u32 pmu_type,
if (print_state->exclude_abi && pmu_type < PERF_TYPE_MAX && pmu_type != PERF_TYPE_RAW)
const char *pmu_name, u32 pmu_type __maybe_unused,
if (print_state->common.exclude_abi && pmu_type < PERF_TYPE_MAX &&
pmu_type != PERF_TYPE_RAW)
return evsel->core.attr.type == spe->pmu_type;
if (evsel->core.attr.type == spe->pmu_type) {
spe->pmu_type = auxtrace_info->priv[ARM_SPE_PMU_TYPE];
spe->pmu_type = auxtrace_info->priv[ARM_SPE_PMU_TYPE_V2];
u32 pmu_type;
return evsel->core.attr.type == aux->pmu_type;
if (evsel->core.attr.type == etm->pmu_type) {
etm->pmu_type = (unsigned int) ((ptr[CS_PMU_TYPE_CPUS] >> 32) & 0xffffffff);
unsigned int pmu_type;
return evsel->core.attr.type == ptt->pmu_type;
ptt->pmu_type = auxtrace_info->priv[0];
u32 pmu_type;
u32 pmu_type;
return evsel->core.attr.type == bts->pmu_type;
if (evsel->core.attr.type == bts->pmu_type && evsel->core.ids) {
bts->pmu_type = auxtrace_info->priv[INTEL_BTS_PMU_TYPE];
if (attr->type == pt->pmu_type) {
return evsel->core.attr.type == pt->pmu_type;
if (evsel->core.attr.type == pt->pmu_type && evsel->core.ids)
pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
u32 pmu_type;
int parse_events__decode_legacy_cache(const char *name, int pmu_type, __u64 *config);
u32 pmu_type;
vpa->pmu_type = auxtrace_info->priv[POWERPC_VPADTL_TYPE];
const char *pmu_name, u32 pmu_type,
sf->pmu_type = PERF_TYPE_RAW;
u32 pmu_type;