pmctrl
struct device *pmctrl = core->pmdomains ?
if (pmctrl) {
ret = pm_runtime_resume_and_get(pmctrl);
if (pmctrl)
pm_runtime_put_sync(pmctrl);
if (ret < 0 && pmctrl)
pm_runtime_put_sync(pmctrl);
if (pmctrl)
pm_runtime_put_sync(pmctrl);
u32 val, pmctrl;
pmctrl = 0;
pmctrl = alx_read_mem32(hw, ALX_PMCTRL);
if (pmctrl & (ALX_PMCTRL_L1_EN | ALX_PMCTRL_L0S_EN))
pmctrl & ~(ALX_PMCTRL_L1_EN |
if (pmctrl & (ALX_PMCTRL_L1_EN | ALX_PMCTRL_L0S_EN))
alx_write_mem32(hw, ALX_PMCTRL, pmctrl);
u32 pmctrl;
pmctrl = alx_read_mem32(hw, ALX_PMCTRL);
ALX_SET_FIELD(pmctrl, ALX_PMCTRL_LCKDET_TIMER,
pmctrl |= ALX_PMCTRL_RCVR_WT_1US |
ALX_SET_FIELD(pmctrl, ALX_PMCTRL_L1REQ_TO, ALX_PMCTRL_L1REG_TO_DEF);
ALX_SET_FIELD(pmctrl, ALX_PMCTRL_L1_TIMER, ALX_PMCTRL_L1_TIMER_16US);
pmctrl &= ~(ALX_PMCTRL_L1_SRDS_EN |
pmctrl |= ALX_PMCTRL_L1_SRDS_EN | ALX_PMCTRL_L1_SRDSPLL_EN;
pmctrl |= (ALX_PMCTRL_L0S_EN | ALX_PMCTRL_ASPM_FCEN);
pmctrl |= (ALX_PMCTRL_L1_EN | ALX_PMCTRL_ASPM_FCEN);
alx_write_mem32(hw, ALX_PMCTRL, pmctrl);
sw32(pmctrl, pmctrl_bits);
sw32(pmctrl, pmctrl_bits);
pmctrl_bits = sr32(pmctrl);
struct regmap *pmctrl;
regmap_write(phy->pmctrl, NOC_POWER_IDLEREQ_1, val);
regmap_read(phy->pmctrl, NOC_POWER_IDLE_1, &val);
regmap_read(phy->pmctrl, NOC_POWER_IDLE_1, &val);
phy->pmctrl = syscon_regmap_lookup_by_compatible("hisilicon,hi3670-pmctrl");
if (IS_ERR(phy->pmctrl))
return PTR_ERR(phy->pmctrl);