pm8001_cr32
pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
regVal = pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET);
pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
regVal = pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK);
pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK));
regVal = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK);
pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK));
regVal = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK);
pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK));
regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1) &
regVal = pm8001_cr32(pm8001_ha, 0,
pm8001_cr32(pm8001_ha, 0,
pm8001_cr32(pm8001_ha, 0,
pm8001_cr32(pm8001_ha, 0,
regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
pm8001_cr32(pm8001_ha, 0,
pm8001_cr32(pm8001_ha, 0,
regVal = pm8001_cr32(pm8001_ha, 1, SPC_REG_RESET);
regVal = pm8001_cr32(pm8001_ha, 1, SPC_REG_RESET);
regVal = pm8001_cr32(pm8001_ha, 1, SPC_IBW_AXI_TRANSLATION_LOW);
value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR);
vec, pm8001_cr32(pm8001_ha, 0, 0x30));
value = pm8001_cr32(pm8001_ha, bar, (work_offset + offset) &
value = pm8001_cr32(pm8001_ha, bar, (work_offset + offset) &
pm8001_cr32(pm8001_ha, 2, 0xd8);
value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET);
value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
value1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0);
value1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3);
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0);
value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1)
value1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2)
value = pm8001_cr32(pm8001_ha, 0, 0x44);
base_addr + pm8001_cr32(pm8001_ha, pcibar, offset + 0x18);
base_addr + pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C);
base_addr + pm8001_cr32(pm8001_ha, pcibar, offset + 0x20);
value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET);
regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2)
regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2) &
regVal1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
regVal2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0));
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3));
regVal = pm8001_cr32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_IOP);
regVal = pm8001_cr32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_AAP1);
regVal = pm8001_cr32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT_ENABLE);
regVal = pm8001_cr32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT);
regVal = pm8001_cr32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT_ENABLE);
regVal = pm8001_cr32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT);
regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1)
pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
regVal = pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET);
pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
regVal1 = pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK);
pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK));
regVal2 = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK);
pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK));
regVal3 = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK);
pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK));
regVal = pm8001_cr32(pm8001_ha, 2, GPIO_GPIO_0_0UTPUT_CTL_OFFSET);
regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET);
value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0);
base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x18) &
base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C) &
base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x20) &
base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C) &
base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x90) &
base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0xA0) &
pm8001_cr32(pm8001_ha, pcibar, offset + 0x18));
pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C));
pm8001_cr32(pm8001_ha, pcibar, offset + 0x20));
pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C));
pm8001_cr32(pm8001_ha, pcibar, offset + 0x90));
scratch3_value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3);
value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET);
u32 scratch_pad_rsvd0 = pm8001_cr32(pm8001_ha, 0,
u32 scratch_pad_rsvd1 = pm8001_cr32(pm8001_ha, 0,
u32 scratch_pad1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
u32 scratch_pad2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
u32 scratch_pad3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3);
u32 r0 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0);
u32 r1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
u32 r2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
u32 r3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3);
regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET);
regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET);
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1) &
ibutton0 = pm8001_cr32(pm8001_ha, 0,
ibutton1 = pm8001_cr32(pm8001_ha, 0,
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0));
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1));
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2));
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3));
pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0));
pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1));
pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2));
pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3));
pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4));
pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5));
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_RSVD_0));
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_RSVD_1));
regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
regval = pm8001_cr32(pm8001_ha, 0,
reg_val = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET) &
value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR);
vec, pm8001_cr32(pm8001_ha, 0, 0x30));
reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER);
value = pm8001_cr32(pm8001_ha, bus_base_number, offset);