pll_writel
pll_writel(pll, val, PLL_CTRL3);
pll_writel(pll, val, PLL_CTRL3);
pll_writel(pll, val, PLL_CTRL4);
pll_writel(pll, val, PLL_CTRL3);
pll_writel(pll, val, PLL_CTRL1);
pll_writel(pll, val, PLL_CTRL2);
pll_writel(pll, val, PLL_CTRL1);
pll_writel(pll, val, PLL_CTRL2);
pll_writel(pll, val, PLL_CTRL1);
pll_writel(pll, val, PLL_CTRL1);
pll_writel(val, pll->params->aux_reg, pll);
pll_writel(val, PLLE_SS_CTRL, pll);
pll_writel(val, PLLE_SS_CTRL, pll);
pll_writel(val, PLLE_SS_CTRL, pll);
pll_writel(val, PLLE_SS_CTRL, pll);
pll_writel(val, pll->params->aux_reg, pll);
pll_writel(val, pll->params->aux_reg, pll);
pll_writel(val, XUSBIO_PLL_CFG0, pll);
pll_writel(val, XUSBIO_PLL_CFG0, pll);
pll_writel(val, SATA_PLL_CFG0, pll);
pll_writel(val, SATA_PLL_CFG0, pll);
pll_writel(val_aux, pll->params->aux_reg, pll);
pll_writel(PLLCX_MISC1_DEFAULT, pll_params->ext_misc_reg[0], pll);
pll_writel(PLLCX_MISC2_DEFAULT, pll_params->ext_misc_reg[1], pll);
pll_writel(PLLCX_MISC3_DEFAULT, pll_params->ext_misc_reg[2], pll);
#define pll_writel_base(val, p) pll_writel(val, p->params->base_reg, p)
#define pll_writel_misc(val, p) pll_writel(val, p->params->misc_reg, p)
pll_writel(PLLSS_CFG_DEFAULT, pll_params->ext_misc_reg[0], pll);
pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[1], pll);
pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[2], pll);
#define pll_writel_sdm_din(val, p) pll_writel(val, p->params->sdm_din_reg, p)
#define pll_writel_sdm_ctrl(val, p) pll_writel(val, p->params->sdm_ctrl_reg, p)
pll_writel(val, PLLE_SS_CTRL, pll);
pll_writel(val, PLLE_SS_CTRL, pll);
pll_writel(val, PLLE_SS_CTRL, pll);
pll_writel(val, PLLE_SS_CTRL, pll);
pll_writel(val, pll->params->aux_reg, pll);
pll_writel(val, pll->params->iddq_reg, pll);
pll_writel(val, pll->params->reset_reg, pll);
pll_writel(val, pll->params->reset_reg, pll);
pll_writel(val, pll->params->iddq_reg, pll);
pll_writel(val, pll->params->ssc_ctrl_reg, pll);
pll_writel(val, pll->params->ssc_ctrl_reg, pll);