pll_readl
val = pll_readl(pll, PLL_CTRL3) & PLL_FRAC_CTRL3_DSMPD;
val = pll_readl(pll, PLL_CTRL3);
val = pll_readl(pll, PLL_CTRL3);
val = pll_readl(pll, PLL_CTRL4);
val = pll_readl(pll, PLL_CTRL3);
return !(pll_readl(pll, PLL_CTRL3) & PLL_FRAC_CTRL3_PD);
val = pll_readl(pll, PLL_CTRL1);
val = pll_readl(pll, PLL_CTRL2);
val = pll_readl(pll, PLL_CTRL1);
val = pll_readl(pll, PLL_CTRL2);
val = pll_readl(pll, PLL_CTRL1);
val = pll_readl(pll, PLL_CTRL2);
val = pll_readl(pll, PLL_CTRL1);
return !(pll_readl(pll, PLL_CTRL1) & PLL_INT_CTRL1_PD);
val = pll_readl(pll, PLL_CTRL1);
val = pll_readl(pll, PLL_CTRL1);
while (!(pll_readl(pll, PLL_STATUS) & PLL_STATUS_LOCK))
val = pll_readl(pll->params->aux_reg, pll);
val = pll_readl(PLLE_SS_CTRL, pll);
val = pll_readl(PLLE_SS_CTRL, pll);
val = pll_readl(pll->params->aux_reg, pll);
val = pll_readl(XUSBIO_PLL_CFG0, pll);
val = pll_readl(SATA_PLL_CFG0, pll);
val = pll_readl(SATA_PLL_CFG0, pll);
val_aux = pll_readl(pll->params->aux_reg, pll);
#define pll_readl_base(p) pll_readl(p->params->base_reg, p)
#define pll_readl_misc(p) pll_readl(p->params->misc_reg, p)
#define pll_readl_sdm_din(p) pll_readl(p->params->sdm_din_reg, p)
#define pll_readl_sdm_ctrl(p) pll_readl(p->params->sdm_ctrl_reg, p)
val = pll_readl(pll->params->aux_reg, pll);
val = pll_readl(PLLE_SS_CTRL, pll);
val = pll_readl(PLLE_SS_CTRL, pll);
val = pll_readl(pll->params->aux_reg, pll);
val = pll_readl(pll->params->aux_reg, pll);
val = pll_readl(pll->params->iddq_reg, pll);
val = pll_readl(pll->params->reset_reg, pll);
val = pll_readl(pll->params->reset_reg, pll);
val = pll_readl(pll->params->iddq_reg, pll);
u32 val = pll_readl(pll->params->ssc_ctrl_reg, pll);
u32 val = pll_readl(pll->params->ssc_ctrl_reg, pll);