pll_config
const struct alpha_pll_config *pll_config;
.pll_config = &ipq5018_pll_config,
.pll_config = &ipq5332_pll_config,
.pll_config = &ipq8074_pll_config,
.pll_config = &ipq6018_pll_config,
.pll_config = &ipq9574_pll_config,
clk_alpha_pll_configure(data->pll, regmap, data->pll_config);
clk_stromer_pll_configure(data->pll, regmap, data->pll_config);
const struct pll_config *config)
const struct pll_config *config, bool fsm_mode)
const struct pll_config *config, bool fsm_mode)
const struct pll_config *config, bool fsm_mode);
const struct pll_config *config, bool fsm_mode);
static const struct pll_config gpll3_config = {
static struct pll_config gpll4_config = {
static const struct pll_config gpll3_config = {
static const struct pll_config pll4_config = {
static const struct pll_config mmpll1_config = {
static const struct pll_config mmpll3_config = {
static const struct pll_config pll15_config = {
static const struct pll_config mmpll1_config = {
static struct pll_config mmpll3_config = {
u16 pll_config, lp_div;
pll_config = construct_pll_config(priv, pclk_mult * mode->clock,
ssd2825_write_reg(priv, SSD2825_PLL_CONFIGURATION_REG, pll_config);
struct pll_config pll_config_g;
u16 pll_config;
ret = wl12xx_top_reg_read(wl, MCS_PLL_CONFIG_REG, &pll_config);
if (pll_config == 0xFFFF)
pll_config |= (input_freq << MCS_SEL_IN_FREQ_SHIFT);
pll_config |= MCS_PLL_ENABLE_HP;
ret = wl12xx_top_reg_write(wl, MCS_PLL_CONFIG_REG, pll_config);
if (pll_ratio_table[cs42l42->pll_config].mclk_src_sel) {
if (pll_ratio_table[cs42l42->pll_config].n > 1) {
regval = pll_ratio_table[cs42l42->pll_config].pll_divout;
if (pll_ratio_table[cs42l42->pll_config].sclk == clk)
cs42l42->pll_config = i;
int pll_config;
if (pll_ratio_table[cs42l84->pll_config].bclk == clk)
cs42l84->pll_config = i;
int pll_config;
if (pll_ratio_table[cs42l84->pll_config].mclk_src_sel) {
if (priv->pll_config)
armada_38x_set_pll(priv->pll_config, rate);
priv->pll_config = devm_platform_ioremap_resource_byname(pdev, "pll_regs");
if (IS_ERR(priv->pll_config))
armada_38x_set_pll(priv->pll_config, 44100);
void __iomem *pll_config;