drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

405

struct pipe_state pipe_state;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

435

struct pipe_state *pipe = &chan->pipe_state;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

563

struct pipe_state *pipe = &chan->pipe_state;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

582

struct pipe_state *pipe = &chan->pipe_state;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

634

struct pipe_state *pipe_state = &chan->pipe_state;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

639

pipe_state_addr = pipe_state->pipe_##addr; \

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

643

u32 *__end_addr = pipe_state->pipe_##addr + \

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

644

ARRAY_SIZE(pipe_state->pipe_##addr); \

drivers/nfc/st-nci/se.c

17

u8 pipe_state;

drivers/nfc/st-nci/se.c

225

ST_NCI_DM_IS_PIPE_OPEN(dm_pipe_info->pipe_state)) {

drivers/nfc/st21nfca/core.c

180

ST21NFCA_DM_IS_PIPE_OPEN(info->pipe_state)) {

drivers/nfc/st21nfca/core.c

94

u8 pipe_state;