phy_speed
if (node->phy_speed == SCODE_BETA && parent_count + child_port_count > 1)
int b_path = (node->phy_speed == SCODE_BETA);
node->max_speed = parent->max_speed < node->phy_speed ?
parent->max_speed : node->phy_speed;
node->max_speed = node->phy_speed;
node->phy_speed = phy_packet_self_id_zero_get_scode(sid);
u8 phy_speed:2; /* As in the self ID packet. */
xgbe_set_speed(pdata, pdata->phy_speed);
pdata->phy_speed = SPEED_UNKNOWN;
pdata->phy_speed = SPEED_UNKNOWN;
if (pdata->phy_speed != pdata->phy.speed) {
pdata->phy_speed = pdata->phy.speed;
pdata->phy_speed = SPEED_UNKNOWN;
int phy_speed;
pdata->phy_speed = SPEED_1000;
switch (pdata->phy_speed) {
int phy_speed;
pdata->phy_speed = SPEED_UNKNOWN;
if (pdata->phy_speed != phydev->speed) {
pdata->phy_speed = phydev->speed;
if (pdata->phy_speed != SPEED_UNKNOWN) {
pdata->phy_speed = SPEED_UNKNOWN;
long rate = rgmii_clock(pdata->phy_speed);
switch (pdata->phy_speed) {
switch (pdata->phy_speed) {
if (pdata->phy_speed != phydev->speed) {
pdata->phy_speed = phydev->speed;
pdata->phy_speed = SPEED_UNKNOWN;
pdata->phy_speed = SPEED_UNKNOWN;
pdata->phy_speed = SPEED_UNKNOWN;
int phy_speed;
p->phy_speed = SPEED_1000;
p->phy_speed = SPEED_100;
p->phy_speed = SPEED_10;
if (p->phy_speed == SPEED_UNKNOWN)
switch (p->phy_speed) {
p->phy_speed);
uint phy_speed;
writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
fep->phy_speed = mii_speed << 1 | holdtime << 8;
fep->phy_speed |= BIT(7);
writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
u16 phy_speed = 0;
phy_speed = phy_data &
if (phy_speed ==
ixgbe_link_speed phy_speed;
hw->phy.speeds_supported |= ixgbe_fw_map[i].phy_speed;
if (hw->phy.autoneg_advertised & ixgbe_fw_map[i].phy_speed)
pep->phy_speed = pep->pd->speed;
int phy_speed;
cmd.base.speed = pep->phy_speed;
pdata->phy_speed = SPEED_25000;
switch (pdata->phy_speed) {
int phy_speed;
u8 phy_speed[16];
speed_names[pp->self_id.phy_speed],
uint32_t phy_speed:2;