drivers/net/ethernet/realtek/r8169_phy_config.c

479

phy_modify(phydev, 0x0b, 0x00ef, 0x0010);

drivers/net/ethernet/realtek/r8169_phy_config.c

480

phy_modify(phydev, 0x0c, 0x5d00, 0xa200);

drivers/net/ethernet/realtek/r8169_phy_config.c

496

phy_modify(phydev, 0x02, 0x0600, 0x0100);

drivers/net/ethernet/realtek/r8169_phy_config.c

517

phy_modify(phydev, 0x02, 0x0600, 0x0100);

drivers/net/phy/adin.c

382

rc = phy_modify(phydev, ADIN1300_PHY_CTRL3,

drivers/net/phy/adin.c

435

return phy_modify(phydev, ADIN1300_PHY_CTRL_STATUS2,

drivers/net/phy/bcm-phy-lib.c

809

return phy_modify(phydev, MII_BCM54XX_LRECR, LRECR_SPEED100, ctl);

drivers/net/phy/bcm54140.c

488

ret = phy_modify(phydev, MII_BMCR, 0, BMCR_PDOWN);

drivers/net/phy/bcm54140.c

492

ret = phy_modify(phydev, MII_BMCR, BMCR_PDOWN, 0);

drivers/net/phy/broadcom.c

1098

return phy_modify(phydev, BCM5221_AEGSR, BCM5221_AEGSR_MDIX_MAN_SWAP |

drivers/net/phy/broadcom.c

782

ret = phy_modify(phydev, MII_BCM54XX_LRECR, LRECR_LDSEN, 0);

drivers/net/phy/dp83822.c

583

err = phy_modify(phydev, MII_DP83822_CTRL_2,

drivers/net/phy/dp83822.c

611

err = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);

drivers/net/phy/dp83867.c

1019

ret = phy_modify(phydev, DP83867_LEDCR1, DP83867_LED_FN_MASK(index),

drivers/net/phy/dp83867.c

1024

return phy_modify(phydev, DP83867_LEDCR2, DP83867_LED_DRV_EN(index), 0);

drivers/net/phy/dp83867.c

1098

return phy_modify(phydev, DP83867_LEDCR2,

drivers/net/phy/dp83867.c

1118

return phy_modify(phydev, DP83867_CFG2, DP83867_SGMII_AUTONEG_EN, val);

drivers/net/phy/dp83867.c

463

return phy_modify(phydev, DP83867_CFG2,

drivers/net/phy/dp83867.c

718

ret = phy_modify(phydev, DP83867_CFG2, DP83867_DOWNSHIFT_EN,

drivers/net/phy/dp83867.c

886

err = phy_modify(phydev, MII_DP83867_PHYCTRL,

drivers/net/phy/dp83867.c

940

return phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,

drivers/net/phy/dp83867.c

959

return phy_modify(phydev, DP83867_LEDCR2,

drivers/net/phy/dp83869.c

481

return phy_modify(phydev, DP83869_CFG2,

drivers/net/phy/dp83869.c

680

ret = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);

drivers/net/phy/dp83869.c

809

ret = phy_modify(phydev, DP83869_CFG2, DP83869_DOWNSHIFT_EN,

drivers/net/phy/intel-xway.c

231

return phy_modify(phydev, XWAY_MDIO_MIICTRL,

drivers/net/phy/intel-xway.c

378

ret = phy_modify(phydev, XWAY_MDIO_LED,

drivers/net/phy/marvell.c

1014

err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,

drivers/net/phy/marvell.c

1104

err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,

drivers/net/phy/marvell.c

1168

err = phy_modify(phydev, MII_M1011_PHY_SCR,

drivers/net/phy/marvell.c

1334

err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,

drivers/net/phy/marvell.c

1451

err = phy_modify(phydev, 0x1e, 0x0fc0,

drivers/net/phy/marvell.c

1578

ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,

drivers/net/phy/marvell.c

2206

err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,

drivers/net/phy/marvell.c

753

err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,

drivers/net/phy/marvell.c

889

ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,

drivers/net/phy/marvell.c

905

return phy_modify(phydev, MII_M1111_PHY_EXT_SR,

drivers/net/phy/marvell.c

931

return phy_modify(phydev, MII_M1111_PHY_EXT_CR,

drivers/net/phy/micrel.c

1512

ret = phy_modify(phydev, KSZ9x31_REMOTE_LOOPBACK, 0,

drivers/net/phy/micrel.c

1568

return phy_modify(phydev, MII_KSZ9131_AUTO_MDIX,

drivers/net/phy/micrel.c

1704

ret = phy_modify(phydev, MII_BMCR,

drivers/net/phy/micrel.c

1887

rv = phy_modify(phydev, MII_CTRL1000,

drivers/net/phy/micrel.c

1925

return phy_modify(phydev, MII_BMCR,

drivers/net/phy/micrel.c

2717

return phy_modify(phydev, MII_BMCR, BMCR_ANENABLE | BMCR_SPEED100,

drivers/net/phy/micrel.c

4812

phy_modify(phydev, LAN8841_OUTPUT_CTRL,

drivers/net/phy/micrel.c

853

return phy_modify(phydev, MII_KSZPHY_CTRL_2,

drivers/net/phy/microchip.c

445

return phy_modify(phydev, LAN937X_MODE_CTRL_STATUS_REG,

drivers/net/phy/microchip_t1.c

1459

ret = phy_modify(phydev, MII_BMCR, BMCR_RESET, BMCR_RESET);

drivers/net/phy/microchip_t1.c

798

ret = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);

drivers/net/phy/motorcomm.c

657

ret = phy_modify(phydev, YTPHY_INTERRUPT_ENABLE_REG, 0,

drivers/net/phy/motorcomm.c

668

ret = phy_modify(phydev, YTPHY_INTERRUPT_ENABLE_REG,

drivers/net/phy/mscc/mscc_main.c

201

return phy_modify(phydev, MSCC_PHY_LED_MODE_SEL, mask, val);

drivers/net/phy/mscc/mscc_main.c

210

return phy_modify(phydev, MSCC_PHY_LED_BEHAVIOR, mask, val);

drivers/net/phy/mscc/mscc_main.c

2117

ret = phy_modify(phydev, MSCC_PHY_EXT_PHY_CNTL_1, MEDIA_OP_MODE_MASK,

drivers/net/phy/mxl-gpy.c

457

ret = phy_modify(phydev, PHY_CTL1, PHY_CTL1_AMDIX | PHY_CTL1_MDIAB |

drivers/net/phy/mxl-gpy.c

861

ret = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, set);

drivers/net/phy/mxl-gpy.c

899

ret = phy_modify(phydev, PHY_LED,

drivers/net/phy/nxp-tja11xx.c

124

ret = phy_modify(phydev, reg, mask, set);

drivers/net/phy/nxp-tja11xx.c

173

ret = phy_modify(phydev, MII_ECTRL, MII_ECTRL_POWER_MODE_MASK,

drivers/net/phy/nxp-tja11xx.c

326

ret = phy_modify(phydev, MII_CFG1, reg_mask, reg_val);

drivers/net/phy/nxp-tja11xx.c

338

ret = phy_modify(phydev, MII_CFG1, reg_mask, reg_val);

drivers/net/phy/nxp-tja11xx.c

355

ret = phy_modify(phydev, MII_CFG2, MII_CFG2_SLEEP_REQUEST_TO,

drivers/net/phy/phy-core.c

614

EXPORT_SYMBOL_GPL(phy_modify);

drivers/net/phy/phy_device.c

2198

return phy_modify(phydev, MII_BMCR,

drivers/net/phy/phy_device.c

2289

return phy_modify(phydev, MII_BMCR, BMCR_ISOLATE,

drivers/net/phy/phy_device.c

2397

err = phy_modify(phydev, MII_BMCR, BMCR_SPEED1000 | BMCR_SPEED100,

drivers/net/phy/phy_device.c

2707

ret = phy_modify(phydev, MII_BMCR, BMCR_ISOLATE, res);

drivers/net/phy/phy_device.c

2840

phy_modify(phydev, MII_BMCR, ~0, ctl);

drivers/net/phy/phy_device.c

2848

phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);

drivers/net/phy/qcom/at803x.c

273

phy_modify(phydev, MII_BMCR, 0, value);

drivers/net/phy/qcom/at803x.c

280

return phy_modify(phydev, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, 0);

drivers/net/phy/qcom/at803x.c

527

return phy_modify(phydev, MII_ADVERTISE, MDIO_AN_CTRL1_XNP, 0);

drivers/net/phy/qcom/qca807x.c

657

ret = phy_modify(phydev,

drivers/net/phy/qcom/qca807x.c

674

return phy_modify(phydev, QCA807X_CHIP_CONFIGURATION,

drivers/net/phy/qcom/qca83xx.c

208

phy_modify(phydev, MII_BMCR, mask, 0);

drivers/net/phy/qcom/qcom-phy-lib.c

87

ret = phy_modify(phydev, AT803X_INTR_ENABLE, 0, AT803X_INTR_ENABLE_WOL);

drivers/net/phy/qcom/qcom-phy-lib.c

92

ret = phy_modify(phydev, AT803X_INTR_ENABLE, AT803X_INTR_ENABLE_WOL, 0);

drivers/net/phy/realtek/realtek_main.c

671

ret = phy_modify(phydev, RTL8211F_PHYCR2, RTL8211F_CLKOUT_EN,

drivers/net/phy/realtek/realtek_main.c

697

return phy_modify(phydev, RTL8211F_PHYCR1, mask, mask);

drivers/net/phy/realtek/realtek_main.c

703

return phy_modify(phydev, RTL8211F_PHYCR2,

drivers/net/phy/smsc.c

297

rc = phy_modify(phydev, SPECIAL_CTRL_STS,

drivers/net/phy/vitesse.c

227

phy_modify(phydev, 0x0c, 0x0300, 0x0200);

drivers/net/phy/vitesse.c

231

phy_modify(phydev, MII_TPISTATUS, 0xff00, 0x0061);

drivers/net/phy/vitesse.c

249

phy_modify(phydev, 0x08, 0x0200, 0x0200);

drivers/net/phy/vitesse.c

252

phy_modify(phydev, 0x12, 0xff07, 0x0003);

drivers/net/phy/vitesse.c

253

phy_modify(phydev, 0x11, 0x00ff, 0x00a2);

drivers/net/phy/vitesse.c

256

phy_modify(phydev, 0x08, 0x0200, 0x0000);

drivers/net/phy/vitesse.c

266

phy_modify(phydev, 0x08, 0x0200, 0x0200);

drivers/net/phy/vitesse.c

276

phy_modify(phydev, 0x08, 0x0200, 0x0000);

drivers/net/phy/vitesse.c

291

phy_modify(phydev, 0x16, 0x0fc0, 0x0240);

drivers/net/phy/vitesse.c

292

phy_modify(phydev, 0x14, 0x6000, 0x4000);

drivers/net/phy/vitesse.c

297

phy_modify(phydev, 0x14, 0xe000, 0x6000);

drivers/net/phy/vitesse.c

314

phy_modify(phydev, 0x08, 0x0200, 0x0200);

drivers/net/phy/vitesse.c

317

phy_modify(phydev, 0x12, 0xff07, 0x0003);

drivers/net/phy/vitesse.c

318

phy_modify(phydev, 0x11, 0x00ff, 0x00a2);

drivers/net/phy/vitesse.c

321

phy_modify(phydev, 0x08, 0x0200, 0x0000);

drivers/net/phy/vitesse.c

327

phy_modify(phydev, 0x16, 0x0fc0, 0x0240);

drivers/net/phy/vitesse.c

328

phy_modify(phydev, 0x14, 0x6000, 0x4000);

drivers/net/phy/vitesse.c

330

phy_modify(phydev, 0x14, 0xe000, 0x6000);

include/linux/phy.h

1845

int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);

include/linux/phy.h

1891

return phy_modify(phydev, regnum, 0, val);

include/linux/phy.h

1902

return phy_modify(phydev, regnum, val, 0);