Symbol: phy_clear_bits
drivers/net/ethernet/realtek/r8169_phy_config.c
497
phy_clear_bits(phydev, 0x03, 0xe000);
drivers/net/ethernet/realtek/r8169_phy_config.c
518
phy_clear_bits(phydev, 0x03, 0xe000);
drivers/net/ethernet/realtek/r8169_phy_config.c
715
phy_clear_bits(phydev, 0x19, BIT(0));
drivers/net/ethernet/realtek/r8169_phy_config.c
716
phy_clear_bits(phydev, 0x10, BIT(10));
drivers/net/phy/adin.c
374
return phy_clear_bits(phydev, ADIN1300_PHY_CTRL2,
drivers/net/phy/adin.c
418
return phy_clear_bits(phydev, ADIN1300_PHY_CTRL_STATUS2,
drivers/net/phy/adin.c
597
err = phy_clear_bits(phydev, ADIN1300_INT_MASK_REG,
drivers/net/phy/adin.c
728
ret = phy_clear_bits(phydev, ADIN1300_PHY_CTRL1, ADIN1300_DIAG_CLK_EN);
drivers/net/phy/adin.c
908
ret = phy_clear_bits(phydev, ADIN1300_PHY_CTRL3, ADIN1300_LINKING_EN);
drivers/net/phy/adin.c
912
ret = phy_clear_bits(phydev, ADIN1300_PHY_CTRL1, ADIN1300_DIAG_CLK_EN);
drivers/net/phy/broadcom.c
191
rc = phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);
drivers/net/phy/broadcom.c
202
return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);
drivers/net/phy/dp83867.c
438
return phy_clear_bits(phydev, DP83867_CFG2,
drivers/net/phy/dp83869.c
456
return phy_clear_bits(phydev, DP83869_CFG2,
drivers/net/phy/intel-xway.c
530
return phy_clear_bits(phydev, XWAY_MDIO_LED, XWAY_GPHY_LED_INV(index));
drivers/net/phy/marvell.c
1098
err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
drivers/net/phy/marvell.c
1162
err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
drivers/net/phy/marvell.c
1556
return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
drivers/net/phy/marvell.c
2379
ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
drivers/net/phy/mediatek/mtk-ge-soc.c
1470
return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);
drivers/net/phy/micrel.c
1955
ret = phy_clear_bits(phydev, MII_KSZPHY_CTRL,
drivers/net/phy/micrel.c
2731
return phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE | BMCR_SPEED100);
drivers/net/phy/micrel.c
829
phy_clear_bits(phydev, MII_KSZPHY_OMSO, KSZPHY_OMSO_FACTORY_TEST);
drivers/net/phy/mxl-gpy.c
1044
return phy_clear_bits(phydev, PHY_LED, PHY_LED_POLARITY(index));
drivers/net/phy/mxl-gpy.c
803
ret = phy_clear_bits(phydev, PHY_IMASK, PHY_IMASK_WOL);
drivers/net/phy/mxl-gpy.c
830
return phy_clear_bits(phydev, PHY_IMASK, PHY_IMASK_LSTC);
drivers/net/phy/nxp-cbtx.c
100
ret = phy_clear_bits(phydev, CBTX_MODE_CTRL_STAT,
drivers/net/phy/nxp-cbtx.c
40
ret = phy_clear_bits(phydev, CBTX_PDOWN_CTRL,
drivers/net/phy/nxp-cbtx.c
92
ret = phy_clear_bits(phydev, CBTX_MODE_CTRL_STAT,
drivers/net/phy/nxp-cbtx.c
97
return phy_clear_bits(phydev, CBTX_MODE_CTRL_STAT,
drivers/net/phy/nxp-tja11xx.c
143
return phy_clear_bits(phydev, MII_ECTRL, MII_ECTRL_LINK_CONTROL);
drivers/net/phy/nxp-tja11xx.c
162
ret = phy_clear_bits(phydev, MII_ECTRL, MII_ECTRL_WAKE_REQUEST);
drivers/net/phy/nxp-tja11xx.c
351
ret = phy_clear_bits(phydev, MII_CFG1, MII_CFG1_SLEEP_CONFIRM);
drivers/net/phy/nxp-tja11xx.c
727
ret = phy_clear_bits(phydev, MII_COMMCFG, MII_COMMCFG_AUTO_OP);
drivers/net/phy/phy_device.c
2822
return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);
drivers/net/phy/smsc.c
97
return phy_clear_bits(phydev, MII_LAN83C185_CTRL_STATUS,