drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1023

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1029

memset(update_state, 0, sizeof(struct pg_block_update));

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1177

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1254

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1296

struct pg_block_update *update_state, bool power_on)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1358

struct pg_block_update pg_update_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1379

struct pg_block_update pg_update_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1561

static void dcn35_calc_blocks_to_ungate_for_hw_release(struct dc *dc, struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1565

memset(update_state, 0, sizeof(struct pg_block_update));

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1581

struct pg_block_update pg_update_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

919

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

927

memset(update_state, 0, sizeof(struct pg_block_update));

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

67

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

69

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

71

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

73

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

75

struct pg_block_update *update_state, bool power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

100

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

153

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

39

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

59

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h

33

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h

35

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h

37

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h

39

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1239

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1241

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1243

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1245

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1247

struct pg_block_update *update_state, bool power_on);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

50

struct pg_block_update;