peek32
reg = peek32(CURRENT_GATE) & ~CURRENT_GATE_M2XCLK_MASK;
reg = peek32(CURRENT_GATE) & ~CURRENT_GATE_MCLK_MASK;
reg = peek32(MODE0_GATE);
reg = peek32(MISC_CTRL) & MISC_CTRL_LOCALMEM_SIZE_MASK;
reg = peek32(CURRENT_GATE);
reg = peek32(VGA_CONFIGURATION);
reg = peek32(MISC_CTRL);
reg = peek32(VIDEO_DISPLAY_CTRL);
reg = peek32(VIDEO_ALPHA_DISPLAY_CTRL);
reg = peek32(ALPHA_DISPLAY_CTRL);
reg = peek32(DMA_ABORT_INTERRUPT);
pll_reg = peek32(MXCLK_PLL_CTRL);
reg = peek32(PANEL_DISPLAY_CTRL);
reg = peek32(PANEL_DISPLAY_CTRL);
reg = peek32(PANEL_DISPLAY_CTRL);
reg = peek32(CRT_DISPLAY_CTRL);
val = peek32(reg);
} while ((peek32(reg) & ~reserved) != (val & ~reserved));
if (!(peek32(PANEL_PLL_CTRL) & PLL_CTRL_POWER) ||
!(peek32(PANEL_DISPLAY_CTRL) & DISPLAY_CTRL_TIMING))
status = peek32(SYSTEM_CTRL);
status = peek32(SYSTEM_CTRL);
reg = peek32(PANEL_DISPLAY_CTRL);
reg = peek32(PANEL_DISPLAY_CTRL);
reg = peek32(CRT_DISPLAY_CTRL) &
reg = (peek32(PANEL_DISPLAY_CTRL) & ~reserved) &
while ((peek32(PANEL_DISPLAY_CTRL) & ~reserved) !=
gate = peek32(CURRENT_GATE);
value = peek32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_DPMS_MASK;
gate = peek32(CURRENT_GATE);
gate = peek32(CURRENT_GATE);
value = peek32(SYSTEM_CTRL);
return peek32(POWER_MODE_CTRL) & POWER_MODE_CTRL_MODE_MASK;
ctrl = peek32(POWER_MODE_CTRL) & ~POWER_MODE_CTRL_MODE_MASK;
gate = peek32(CURRENT_GATE);
(peek32(MISC_CTRL) & ~MISC_CTRL_DAC_POWER_OFF) | (off)); \
gpio_dir = peek32(sw_i2c_clk_gpio_data_dir_reg);
gpio_data = peek32(sw_i2c_clk_gpio_data_reg);
gpio_dir = peek32(sw_i2c_data_gpio_data_dir_reg);
gpio_data = peek32(sw_i2c_data_gpio_data_reg);
gpio_dir = peek32(sw_i2c_data_gpio_data_dir_reg);
gpio_data = peek32(sw_i2c_data_gpio_data_reg);
peek32(sw_i2c_clk_gpio_mux_reg) & ~(1 << sw_i2c_clk_gpio));
peek32(sw_i2c_data_gpio_mux_reg) & ~(1 << sw_i2c_data_gpio));
peek32(SYSTEM_CTRL) | SYSTEM_CTRL_PCI_BURST);
peek32(MISC_CTRL) | MISC_CTRL_DAC_POWER_OFF);
val = peek32(SYSTEM_CTRL) & ~SYSTEM_CTRL_DPMS_MASK;
peek32(MISC_CTRL) & ~MISC_CTRL_DAC_POWER_OFF);
val = peek32(SYSTEM_CTRL) & ~SYSTEM_CTRL_DPMS_MASK;
val = peek32(PANEL_DISPLAY_CTRL) &
reg = peek32(DISPLAY_CONTROL_750LE);
reg = peek32(PANEL_DISPLAY_CTRL);
reg = peek32(CRT_DISPLAY_CTRL);
val = peek32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_DPMS_MASK;
val = peek32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_BLANK;
unsigned int val = peek32(SYSTEM_CTRL) & ~SYSTEM_CTRL_DPMS_MASK;
val = peek32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_BLANK;
unsigned int val = peek32(PANEL_DISPLAY_CTRL);
reg = peek32(DE_STATE1);
reg = peek32(DE_STATE1);
reg = peek32(SYSTEM_CTRL);
reg = peek32(SYSTEM_CTRL);
unsigned int val = peek32(DE_STATE2);
unsigned int val = peek32(SYSTEM_CTRL);
peek32(PANEL_FB_ADDRESS) |
peek32(CRT_FB_ADDRESS) |