out_le16
#define isa_outw(val,port) (ISA_SEX ? out_be16(isa_itw(port),(val)) : out_le16(isa_itw(port),(val)))
: out_le16(isa_mtw((unsigned long)(p)),(val)))
#define outw(val, port) ((port) < 1024 ? isa_rom_outw((val), (port)) : out_le16((port), (val)))
#define outw_p(val, port) ((port) < 1024 ? isa_rom_outw_p((val), (port)) : out_le16((port), (val)))
#define writew(val, addr) out_le16((addr), (val))
DEF_MMIO_OUT_X(out_le16, 16, sthbrx);
DEF_MMIO_OUT_D(out_le16, 16, sth);
out_le16(addr, val);
out_le16(addr, val >> 16);
out_le16((u16 *)(addr + offset), val);
out_le16(mbase + PCI_COMMAND,
out_le16(mbase + 0x200, val);
out_le16(mbase + 0x202, val);
out_le16(mbase + 0x204, 0x7);
out_le16(((u16 __iomem *)hose->cfg_data) +
out_le16((u16 __iomem *)hose->cfg_data,
out_le16(((u16 __iomem *)hose->cfg_data) + 1,
out_le16(cfg_data, val);
out_le16(addr, val);
swap ? out_le16(addr, val) : out_be16(addr, val);
out_le16(cfg_data, val);
out_le16((u16 *) cfg_addr, val);
out_le16(&cp->command, DBDMA_STOP);
out_le16(&cp->xfer_status, 0);
out_le16(&cp->xfer_status, 0);
out_le16(&cp->command, OUTPUT_LAST);
out_le16(&cp->command, cmd);
out_le16(&cp->req_count, count);
out_le16(&cp->xfer_status, 0);
out_le16(&cp->res_count, 0);
out_le16((void __iomem *)dev->base_addr + reg_offset, data);
out_le16(&np->command, DBDMA_STOP);
out_le16(&cp->xfer_status, 0);
out_le16(&cp->command, OUTPUT_LAST);
out_le16(&cp->xfer_status, 0);
out_le16(&cp->command, OUTPUT_LAST);
out_le16(&cp->xfer_status, 0);
out_le16(&cp->xfer_status, 0);
out_le16(&cp->command, OUTPUT_LAST);
out_le16(&cp->command, DBDMA_STOP);
out_le16(&cp->xfer_status, 0);
out_le16(&cp->command, INPUT_LAST + INTR_ALWAYS);
out_le16(par->ati_regbase + regindex, val);
out_le16(&cp->command, command);
out_le16(&cp->command, DBDMA_STOP);