pcr_dbg
pcr_dbg(pcr, "After CD deglitch, card_exist = 0x%x\n",
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg1);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG3, reg3);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock);
pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n",
pcr_dbg(pcr, "n = %d, div = %d\n", n, div);
pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
pcr_dbg(pcr, "skip fetch vendor setting\n");
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
pcr_dbg(pcr, "Enable efuse por!");
pcr_dbg(pcr, "save efuse to autoload");
pcr_dbg(pcr, "Disable efuse por!");
pcr_dbg(pcr, "Power ON efuse!");
pcr_dbg(pcr, "Load from autoload");
pcr_dbg(pcr, "Power OFF efuse!");
pcr_dbg(pcr, "unknown output voltage %d\n", voltage);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
pcr_dbg(pcr, "skip fetch vendor setting\n");
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
pcr_dbg(pcr, "Set parameters for L1.2.");
pcr_dbg(pcr, "Set parameters for L1.1.");
pcr_dbg(pcr, "Set parameters for L1.");
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
pcr_dbg(pcr, "skip fetch vendor setting\n");
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
pcr_dbg(pcr, "Load efuse valid: 0x%x\n", efuse_valid);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, lval2);
pcr_dbg(pcr, "Disable efuse por!\n");
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", setting_reg2, lval2);
pcr_dbg(pcr, "skip fetch vendor setting\n");
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", setting_reg1, lval1);
pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock);
pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n",
pcr_dbg(pcr, "n = %d, div = %d\n", n, div);
pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth);
pcr_dbg(pcr, "Load efuse len: 0x%x\n", efuse_len);
pcr_dbg(pcr, "Load efuse valid: 0x%x\n", efuse_valid);
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, lval2);
pcr_dbg(pcr, "Disable efuse por!\n");
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", setting_reg2, lval2);
pcr_dbg(pcr, "skip fetch vendor setting\n");
pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", setting_reg1, lval1);
pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock);
pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n",
pcr_dbg(pcr, "n = %d, div = %d\n", n, div);
pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth);
pcr_dbg(pcr, "%s: pcr->msi_en = %d, pci->irq = %d\n",
pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n",
pcr_dbg(pcr, "pcr->aspm_en = 0x%x\n", pcr->aspm_en);
pcr_dbg(pcr, "pcr->sd30_drive_sel_1v8 = 0x%x\n",
pcr_dbg(pcr, "pcr->sd30_drive_sel_3v3 = 0x%x\n",
pcr_dbg(pcr, "pcr->card_drive_sel = 0x%x\n",
pcr_dbg(pcr, "pcr->flags = 0x%x\n", pcr->flags);
pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__);
pcr_dbg(pcr, "DMA addr: 0x%x, Len: 0x%x\n", (unsigned int)addr, len);
pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__);
pcr_dbg(pcr, "RTSX_BIER: 0x%08x\n", pcr->bier);
pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock);
pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n",
pcr_dbg(pcr, "n = %d, div = %d\n", n, div);
pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth);
pcr_dbg(pcr, "--> %s\n", __func__);
pcr_dbg(pcr, "irq_status: 0x%08x\n", irq_status);
pcr_dbg(pcr, "card_inserted: 0x%x, card_removed: 0x%x\n",