arch/mips/pci/pci-mt7620.c

224

pcie_phy(0x0, 0x80);

arch/mips/pci/pci-mt7620.c

225

pcie_phy(0x1, 0x04);

arch/mips/pci/pci-mt7620.c

228

pcie_phy(0x68, 0xB4);

drivers/phy/mediatek/phy-mtk-pcie.c

112

struct mtk_pcie_phy *pcie_phy = phy_get_drvdata(phy);

drivers/phy/mediatek/phy-mtk-pcie.c

115

if (!pcie_phy->sw_efuse_en)

drivers/phy/mediatek/phy-mtk-pcie.c

119

mtk_phy_update_field(pcie_phy->sif_base + PEXTP_ANA_GLB_00_REG,

drivers/phy/mediatek/phy-mtk-pcie.c

120

EFUSE_GLB_INTR_SEL, pcie_phy->efuse_glb_intr);

drivers/phy/mediatek/phy-mtk-pcie.c

122

for (i = 0; i < pcie_phy->data->num_lanes; i++)

drivers/phy/mediatek/phy-mtk-pcie.c

123

mtk_pcie_efuse_set_lane(pcie_phy, i);

drivers/phy/mediatek/phy-mtk-pcie.c

133

static int mtk_pcie_efuse_read_for_lane(struct mtk_pcie_phy *pcie_phy,

drivers/phy/mediatek/phy-mtk-pcie.c

136

struct mtk_pcie_lane_efuse *efuse = &pcie_phy->efuse[lane];

drivers/phy/mediatek/phy-mtk-pcie.c

137

struct device *dev = pcie_phy->dev;

drivers/phy/mediatek/phy-mtk-pcie.c

166

static int mtk_pcie_read_efuse(struct mtk_pcie_phy *pcie_phy)

drivers/phy/mediatek/phy-mtk-pcie.c

168

struct device *dev = pcie_phy->dev;

drivers/phy/mediatek/phy-mtk-pcie.c

178

&pcie_phy->efuse_glb_intr);

drivers/phy/mediatek/phy-mtk-pcie.c

182

pcie_phy->sw_efuse_en = true;

drivers/phy/mediatek/phy-mtk-pcie.c

184

pcie_phy->efuse = devm_kzalloc(dev, pcie_phy->data->num_lanes *

drivers/phy/mediatek/phy-mtk-pcie.c

185

sizeof(*pcie_phy->efuse), GFP_KERNEL);

drivers/phy/mediatek/phy-mtk-pcie.c

186

if (!pcie_phy->efuse)

drivers/phy/mediatek/phy-mtk-pcie.c

189

for (i = 0; i < pcie_phy->data->num_lanes; i++) {

drivers/phy/mediatek/phy-mtk-pcie.c

190

ret = mtk_pcie_efuse_read_for_lane(pcie_phy, i);

drivers/phy/mediatek/phy-mtk-pcie.c

202

struct mtk_pcie_phy *pcie_phy;

drivers/phy/mediatek/phy-mtk-pcie.c

205

pcie_phy = devm_kzalloc(dev, sizeof(*pcie_phy), GFP_KERNEL);

drivers/phy/mediatek/phy-mtk-pcie.c

206

if (!pcie_phy)

drivers/phy/mediatek/phy-mtk-pcie.c

209

pcie_phy->sif_base = devm_platform_ioremap_resource_byname(pdev, "sif");

drivers/phy/mediatek/phy-mtk-pcie.c

210

if (IS_ERR(pcie_phy->sif_base))

drivers/phy/mediatek/phy-mtk-pcie.c

211

return dev_err_probe(dev, PTR_ERR(pcie_phy->sif_base),

drivers/phy/mediatek/phy-mtk-pcie.c

214

pcie_phy->phy = devm_phy_create(dev, dev->of_node, &mtk_pcie_phy_ops);

drivers/phy/mediatek/phy-mtk-pcie.c

215

if (IS_ERR(pcie_phy->phy))

drivers/phy/mediatek/phy-mtk-pcie.c

216

return dev_err_probe(dev, PTR_ERR(pcie_phy->phy),

drivers/phy/mediatek/phy-mtk-pcie.c

219

pcie_phy->dev = dev;

drivers/phy/mediatek/phy-mtk-pcie.c

220

pcie_phy->data = of_device_get_match_data(dev);

drivers/phy/mediatek/phy-mtk-pcie.c

221

if (!pcie_phy->data)

drivers/phy/mediatek/phy-mtk-pcie.c

224

if (pcie_phy->data->sw_efuse_supported) {

drivers/phy/mediatek/phy-mtk-pcie.c

229

ret = mtk_pcie_read_efuse(pcie_phy);

drivers/phy/mediatek/phy-mtk-pcie.c

234

phy_set_drvdata(pcie_phy->phy, pcie_phy);

drivers/phy/mediatek/phy-mtk-pcie.c

80

static void mtk_pcie_efuse_set_lane(struct mtk_pcie_phy *pcie_phy,

drivers/phy/mediatek/phy-mtk-pcie.c

83

struct mtk_pcie_lane_efuse *data = &pcie_phy->efuse[lane];

drivers/phy/mediatek/phy-mtk-pcie.c

89

addr = pcie_phy->sif_base + PEXTP_ANA_LN0_TRX_REG +

drivers/phy/phy-airoha-pcie.c

100

airoha_phy_update_field((pcie_phy)->pma1 + (reg), (mask), (val))

drivers/phy/phy-airoha-pcie.c

1001

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CDR1_PR_COR_HBW,

drivers/phy/phy-airoha-pcie.c

1004

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CDR0_LPF_RATIO,

drivers/phy/phy-airoha-pcie.c

1006

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CDR1_LPF_RATIO,

drivers/phy/phy-airoha-pcie.c

1009

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CDR0_PR_BETA_DAC,

drivers/phy/phy-airoha-pcie.c

1011

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CDR1_PR_BETA_DAC,

drivers/phy/phy-airoha-pcie.c

1013

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CDR0_PR_BETA_DAC,

drivers/phy/phy-airoha-pcie.c

1015

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CDR1_PR_BETA_DAC,

drivers/phy/phy-airoha-pcie.c

1019

static void airoha_pcie_phy_set_txflow(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

1021

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_TX0_CKLDO,

drivers/phy/phy-airoha-pcie.c

1023

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_TX1_CKLDO,

drivers/phy/phy-airoha-pcie.c

1026

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_TX0_CKLDO,

drivers/phy/phy-airoha-pcie.c

1028

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_TX1_CKLDO,

drivers/phy/phy-airoha-pcie.c

103

airoha_phy_init_lane0_rx_fw_pre_calib(struct airoha_pcie_phy *pcie_phy,

drivers/phy/phy-airoha-pcie.c

1030

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TX1_MULTLANE,

drivers/phy/phy-airoha-pcie.c

1034

static void airoha_pcie_phy_set_rx_mode(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

1036

writel(0x804000, pcie_phy->pma0 + REG_PCIE_PMA_DIG_RESERVE_27);

drivers/phy/phy-airoha-pcie.c

1037

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_18,

drivers/phy/phy-airoha-pcie.c

1039

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_18,

drivers/phy/phy-airoha-pcie.c

1041

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_18,

drivers/phy/phy-airoha-pcie.c

1043

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_30,

drivers/phy/phy-airoha-pcie.c

1046

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CDR0_PR_MONCK,

drivers/phy/phy-airoha-pcie.c

1048

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CDR0_PR_MONCK,

drivers/phy/phy-airoha-pcie.c

1050

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

1053

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

1056

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

1060

writel(0x804000, pcie_phy->pma1 + REG_PCIE_PMA_DIG_RESERVE_27);

drivers/phy/phy-airoha-pcie.c

1061

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_18,

drivers/phy/phy-airoha-pcie.c

1063

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_18,

drivers/phy/phy-airoha-pcie.c

1065

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_18,

drivers/phy/phy-airoha-pcie.c

1068

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_30,

drivers/phy/phy-airoha-pcie.c

1071

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CDR1_PR_MONCK,

drivers/phy/phy-airoha-pcie.c

1073

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CDR1_PR_MONCK,

drivers/phy/phy-airoha-pcie.c

1075

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX1_OSCAL_VGA1IOS,

drivers/phy/phy-airoha-pcie.c

1077

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX1_OSCAL_VGA1IOS,

drivers/phy/phy-airoha-pcie.c

1079

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX1_OSCAL_VGA1IOS,

drivers/phy/phy-airoha-pcie.c

1083

static void airoha_pcie_phy_load_kflow(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

1085

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_12,

drivers/phy/phy-airoha-pcie.c

1087

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_12,

drivers/phy/phy-airoha-pcie.c

1089

airoha_phy_init_lane0_rx_fw_pre_calib(pcie_phy, PCIE_PORT_GEN3);

drivers/phy/phy-airoha-pcie.c

1090

airoha_phy_init_lane1_rx_fw_pre_calib(pcie_phy, PCIE_PORT_GEN3);

drivers/phy/phy-airoha-pcie.c

1092

airoha_phy_pma0_clear_bits(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_12,

drivers/phy/phy-airoha-pcie.c

1094

airoha_phy_pma1_clear_bits(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_12,

drivers/phy/phy-airoha-pcie.c

1098

airoha_phy_init_lane0_rx_fw_pre_calib(pcie_phy, PCIE_PORT_GEN2);

drivers/phy/phy-airoha-pcie.c

1099

airoha_phy_init_lane1_rx_fw_pre_calib(pcie_phy, PCIE_PORT_GEN2);

drivers/phy/phy-airoha-pcie.c

111

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

1112

struct airoha_pcie_phy *pcie_phy = phy_get_drvdata(phy);

drivers/phy/phy-airoha-pcie.c

1121

writel(val, pcie_phy->p0_xr_dtime + REG_PCIE_PEXTP_DIG_GLB44);

drivers/phy/phy-airoha-pcie.c

1122

writel(val, pcie_phy->p1_xr_dtime + REG_PCIE_PEXTP_DIG_GLB44);

drivers/phy/phy-airoha-pcie.c

1126

writel(val, pcie_phy->rx_aeq + REG_PCIE_PEXTP_DIG_LN_RX30_P0);

drivers/phy/phy-airoha-pcie.c

1127

writel(val, pcie_phy->rx_aeq + REG_PCIE_PEXTP_DIG_LN_RX30_P1);

drivers/phy/phy-airoha-pcie.c

1130

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_14,

drivers/phy/phy-airoha-pcie.c

1132

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_14,

drivers/phy/phy-airoha-pcie.c

1135

airoha_pcie_phy_init_default(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1136

airoha_pcie_phy_init_clk_out(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1137

airoha_pcie_phy_init_csr_2l(pcie_phy);

drivers/phy/phy-airoha-pcie.c

114

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET2,

drivers/phy/phy-airoha-pcie.c

1141

airoha_pcie_phy_init_rx(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1143

airoha_pcie_phy_init_jcpll(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1148

airoha_pcie_phy_txpll(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1153

airoha_pcie_phy_init_ssc_jcpll(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1158

airoha_pcie_phy_set_rxlan0_signal_detect(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1160

airoha_pcie_phy_set_rxlan1_signal_detect(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1162

airoha_pcie_phy_set_rxflow(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1166

airoha_pcie_phy_set_pr(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1168

airoha_pcie_phy_set_txflow(pcie_phy);

drivers/phy/phy-airoha-pcie.c

117

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET2,

drivers/phy/phy-airoha-pcie.c

1172

airoha_pcie_phy_set_rx_mode(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1174

airoha_pcie_phy_load_kflow(pcie_phy);

drivers/phy/phy-airoha-pcie.c

1175

airoha_phy_pma0_clear_bits(pcie_phy, REG_PCIE_PMA_SS_DA_XPON_PWDB0,

drivers/phy/phy-airoha-pcie.c

1177

airoha_phy_pma1_clear_bits(pcie_phy, REG_PCIE_PMA_SS_DA_XPON_PWDB0,

drivers/phy/phy-airoha-pcie.c

1182

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_SS_DA_XPON_PWDB0,

drivers/phy/phy-airoha-pcie.c

1184

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_SS_DA_XPON_PWDB0,

drivers/phy/phy-airoha-pcie.c

1195

struct airoha_pcie_phy *pcie_phy = phy_get_drvdata(phy);

drivers/phy/phy-airoha-pcie.c

1197

airoha_phy_pma0_clear_bits(pcie_phy, REG_PCIE_PMA_SW_RESET,

drivers/phy/phy-airoha-pcie.c

1199

airoha_phy_pma1_clear_bits(pcie_phy, REG_PCIE_PMA_SW_RESET,

drivers/phy/phy-airoha-pcie.c

120

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET1,

drivers/phy/phy-airoha-pcie.c

1201

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_SSC,

drivers/phy/phy-airoha-pcie.c

1217

struct airoha_pcie_phy *pcie_phy;

drivers/phy/phy-airoha-pcie.c

122

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET4,

drivers/phy/phy-airoha-pcie.c

1221

pcie_phy = devm_kzalloc(dev, sizeof(*pcie_phy), GFP_KERNEL);

drivers/phy/phy-airoha-pcie.c

1222

if (!pcie_phy)

drivers/phy/phy-airoha-pcie.c

1225

pcie_phy->csr_2l = devm_platform_ioremap_resource_byname(pdev, "csr-2l");

drivers/phy/phy-airoha-pcie.c

1226

if (IS_ERR(pcie_phy->csr_2l))

drivers/phy/phy-airoha-pcie.c

1227

return dev_err_probe(dev, PTR_ERR(pcie_phy->csr_2l),

drivers/phy/phy-airoha-pcie.c

1230

pcie_phy->pma0 = devm_platform_ioremap_resource_byname(pdev, "pma0");

drivers/phy/phy-airoha-pcie.c

1231

if (IS_ERR(pcie_phy->pma0))

drivers/phy/phy-airoha-pcie.c

1232

return dev_err_probe(dev, PTR_ERR(pcie_phy->pma0),

drivers/phy/phy-airoha-pcie.c

1235

pcie_phy->pma1 = devm_platform_ioremap_resource_byname(pdev, "pma1");

drivers/phy/phy-airoha-pcie.c

1236

if (IS_ERR(pcie_phy->pma1))

drivers/phy/phy-airoha-pcie.c

1237

return dev_err_probe(dev, PTR_ERR(pcie_phy->pma1),

drivers/phy/phy-airoha-pcie.c

124

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET3,

drivers/phy/phy-airoha-pcie.c

1240

pcie_phy->phy = devm_phy_create(dev, dev->of_node, &airoha_pcie_phy_ops);

drivers/phy/phy-airoha-pcie.c

1241

if (IS_ERR(pcie_phy->phy))

drivers/phy/phy-airoha-pcie.c

1242

return dev_err_probe(dev, PTR_ERR(pcie_phy->phy),

drivers/phy/phy-airoha-pcie.c

1245

pcie_phy->p0_xr_dtime =

drivers/phy/phy-airoha-pcie.c

1247

if (IS_ERR(pcie_phy->p0_xr_dtime))

drivers/phy/phy-airoha-pcie.c

1248

return dev_err_probe(dev, PTR_ERR(pcie_phy->p0_xr_dtime),

drivers/phy/phy-airoha-pcie.c

1251

pcie_phy->p1_xr_dtime =

drivers/phy/phy-airoha-pcie.c

1253

if (IS_ERR(pcie_phy->p1_xr_dtime))

drivers/phy/phy-airoha-pcie.c

1254

return dev_err_probe(dev, PTR_ERR(pcie_phy->p1_xr_dtime),

drivers/phy/phy-airoha-pcie.c

1257

pcie_phy->rx_aeq = devm_platform_ioremap_resource_byname(pdev, "rx-aeq");

drivers/phy/phy-airoha-pcie.c

1258

if (IS_ERR(pcie_phy->rx_aeq))

drivers/phy/phy-airoha-pcie.c

1259

return dev_err_probe(dev, PTR_ERR(pcie_phy->rx_aeq),

drivers/phy/phy-airoha-pcie.c

1262

pcie_phy->dev = dev;

drivers/phy/phy-airoha-pcie.c

1263

phy_set_drvdata(pcie_phy->phy, pcie_phy);

drivers/phy/phy-airoha-pcie.c

127

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET3,

drivers/phy/phy-airoha-pcie.c

130

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET1,

drivers/phy/phy-airoha-pcie.c

133

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET4,

drivers/phy/phy-airoha-pcie.c

136

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_CDR0_PR_INJ_MODE,

drivers/phy/phy-airoha-pcie.c

139

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

142

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

145

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

148

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

151

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

155

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

158

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

161

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

166

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

169

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

172

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

179

readl(pcie_phy->pma0 +

drivers/phy/phy-airoha-pcie.c

187

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

190

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

193

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

200

readl(pcie_phy->pma0 +

drivers/phy/phy-airoha-pcie.c

208

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

216

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

219

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

225

val = readl(pcie_phy->pma0 + REG_PCIE_PMA_RO_RX_FREQDET);

drivers/phy/phy-airoha-pcie.c

231

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CDR0_PR_INJ_MODE,

drivers/phy/phy-airoha-pcie.c

234

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

237

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

240

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

243

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

247

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

252

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

256

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

264

airoha_phy_init_lane1_rx_fw_pre_calib(struct airoha_pcie_phy *pcie_phy,

drivers/phy/phy-airoha-pcie.c

272

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

275

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET2,

drivers/phy/phy-airoha-pcie.c

278

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET2,

drivers/phy/phy-airoha-pcie.c

281

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET1,

drivers/phy/phy-airoha-pcie.c

283

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET4,

drivers/phy/phy-airoha-pcie.c

285

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET3,

drivers/phy/phy-airoha-pcie.c

288

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET3,

drivers/phy/phy-airoha-pcie.c

291

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET1,

drivers/phy/phy-airoha-pcie.c

294

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_FREQ_DET4,

drivers/phy/phy-airoha-pcie.c

297

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_CDR1_PR_INJ_MODE,

drivers/phy/phy-airoha-pcie.c

300

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

303

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

306

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

309

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

312

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

315

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

318

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

321

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

326

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

329

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

332

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

339

readl(pcie_phy->pma1 +

drivers/phy/phy-airoha-pcie.c

347

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

350

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

353

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

360

readl(pcie_phy->pma1 +

drivers/phy/phy-airoha-pcie.c

368

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

376

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

379

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

385

val = readl(pcie_phy->pma1 + REG_PCIE_PMA_RO_RX_FREQDET);

drivers/phy/phy-airoha-pcie.c

391

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CDR1_PR_INJ_MODE,

drivers/phy/phy-airoha-pcie.c

394

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

397

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

400

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

403

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

407

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

412

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

416

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

423

static void airoha_pcie_phy_init_default(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

425

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CMN,

drivers/phy/phy-airoha-pcie.c

427

writel(0xcccbcccb, pcie_phy->pma0 + REG_PCIE_PMA_DIG_RESERVE_21);

drivers/phy/phy-airoha-pcie.c

428

writel(0xcccb, pcie_phy->pma0 + REG_PCIE_PMA_DIG_RESERVE_22);

drivers/phy/phy-airoha-pcie.c

429

writel(0xcccbcccb, pcie_phy->pma1 + REG_PCIE_PMA_DIG_RESERVE_21);

drivers/phy/phy-airoha-pcie.c

430

writel(0xcccb, pcie_phy->pma1 + REG_PCIE_PMA_DIG_RESERVE_22);

drivers/phy/phy-airoha-pcie.c

431

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_CMN,

drivers/phy/phy-airoha-pcie.c

435

static void airoha_pcie_phy_init_clk_out(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

437

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

440

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

443

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

446

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CLKTX1_OFFSET,

drivers/phy/phy-airoha-pcie.c

448

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CLKTX0_FORCE_OUT1,

drivers/phy/phy-airoha-pcie.c

450

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CLKTX1_OFFSET,

drivers/phy/phy-airoha-pcie.c

452

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

455

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CLKTX1_IMP_SEL,

drivers/phy/phy-airoha-pcie.c

457

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_POSTDIV_D256,

drivers/phy/phy-airoha-pcie.c

459

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CLKTX1_OFFSET,

drivers/phy/phy-airoha-pcie.c

461

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_PLL_CMN_RESERVE0,

drivers/phy/phy-airoha-pcie.c

465

static void airoha_pcie_phy_init_csr_2l(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

467

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_SW_RESET,

drivers/phy/phy-airoha-pcie.c

470

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_SW_RESET,

drivers/phy/phy-airoha-pcie.c

473

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_TX_RESET,

drivers/phy/phy-airoha-pcie.c

475

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_TX_RESET,

drivers/phy/phy-airoha-pcie.c

479

static void airoha_pcie_phy_init_rx(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

481

writel(0x2a00090b, pcie_phy->pma0 + REG_PCIE_PMA_DIG_RESERVE_17);

drivers/phy/phy-airoha-pcie.c

482

writel(0x2a00090b, pcie_phy->pma1 + REG_PCIE_PMA_DIG_RESERVE_17);

drivers/phy/phy-airoha-pcie.c

483

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_CDR0_PR_MONPI,

drivers/phy/phy-airoha-pcie.c

485

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_CDR1_PR_MONPI,

drivers/phy/phy-airoha-pcie.c

487

airoha_phy_csr_2l_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

490

airoha_phy_csr_2l_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

493

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX0_PHYCK_DIV,

drivers/phy/phy-airoha-pcie.c

495

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX1_PHYCK_DIV,

drivers/phy/phy-airoha-pcie.c

499

static void airoha_pcie_phy_init_jcpll(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

501

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_PXP_JCPLL_CKOUT,

drivers/phy/phy-airoha-pcie.c

503

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

506

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_PXP_JCPLL_CKOUT,

drivers/phy/phy-airoha-pcie.c

508

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

511

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_TCL_VTP_EN,

drivers/phy/phy-airoha-pcie.c

513

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_RST_DLY,

drivers/phy/phy-airoha-pcie.c

515

writel(0x0, pcie_phy->csr_2l + REG_CSR_2L_JCPLL_SSC_DELTA1);

drivers/phy/phy-airoha-pcie.c

516

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_SSC_PERIOD,

drivers/phy/phy-airoha-pcie.c

518

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_SSC,

drivers/phy/phy-airoha-pcie.c

520

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_SSC,

drivers/phy/phy-airoha-pcie.c

522

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_LPF_BR,

drivers/phy/phy-airoha-pcie.c

524

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_LPF_BR,

drivers/phy/phy-airoha-pcie.c

526

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_LPF_BR,

drivers/phy/phy-airoha-pcie.c

528

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_LPF_BWC,

drivers/phy/phy-airoha-pcie.c

530

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_LPF_BR,

drivers/phy/phy-airoha-pcie.c

532

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

536

airoha_phy_csr_2l_clear_bits(pcie_phy, CSR_2L_PXP_JCPLL_MONCK,

drivers/phy/phy-airoha-pcie.c

539

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_DA_PXP_RX_FE_VOS,

drivers/phy/phy-airoha-pcie.c

541

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_DA_PXP_RX_FE_VOS,

drivers/phy/phy-airoha-pcie.c

543

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

547

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

552

airoha_phy_csr_2l_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

555

airoha_phy_csr_2l_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

558

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_RST_DLY,

drivers/phy/phy-airoha-pcie.c

560

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_RST_DLY,

drivers/phy/phy-airoha-pcie.c

562

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_TCL_KBAND_VREF,

drivers/phy/phy-airoha-pcie.c

564

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_IB_EXT,

drivers/phy/phy-airoha-pcie.c

566

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_IB_EXT,

drivers/phy/phy-airoha-pcie.c

568

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

572

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_VCODIV,

drivers/phy/phy-airoha-pcie.c

574

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_VCODIV,

drivers/phy/phy-airoha-pcie.c

576

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_VCODIV,

drivers/phy/phy-airoha-pcie.c

578

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_IB_EXT,

drivers/phy/phy-airoha-pcie.c

580

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_KBAND_KFC,

drivers/phy/phy-airoha-pcie.c

582

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_KBAND_KFC,

drivers/phy/phy-airoha-pcie.c

584

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_KBAND_KFC,

drivers/phy/phy-airoha-pcie.c

586

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_KBAND_KFC,

drivers/phy/phy-airoha-pcie.c

588

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_LPF_BWC,

drivers/phy/phy-airoha-pcie.c

591

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_SCAN_MODE,

drivers/phy/phy-airoha-pcie.c

593

airoha_phy_pma0_clear_bits(pcie_phy, REG_PCIE_PMA_SCAN_MODE,

drivers/phy/phy-airoha-pcie.c

596

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_LPF_BWC,

drivers/phy/phy-airoha-pcie.c

598

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SDM_HREN,

drivers/phy/phy-airoha-pcie.c

600

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_TCL_CMP,

drivers/phy/phy-airoha-pcie.c

602

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

605

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_SDM_HREN,

drivers/phy/phy-airoha-pcie.c

607

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_SDM_HREN,

drivers/phy/phy-airoha-pcie.c

609

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_TCL_CMP,

drivers/phy/phy-airoha-pcie.c

611

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_VCO_TCLVAR,

drivers/phy/phy-airoha-pcie.c

614

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_PXP_JCPLL_CKOUT,

drivers/phy/phy-airoha-pcie.c

616

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_PXP_JCPLL_CKOUT,

drivers/phy/phy-airoha-pcie.c

618

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_PXP_JCPLL_CKOUT,

drivers/phy/phy-airoha-pcie.c

620

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_PXP_JCPLL_CKOUT,

drivers/phy/phy-airoha-pcie.c

622

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_PXP_JCPLL_CKOUT,

drivers/phy/phy-airoha-pcie.c

624

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_PXP_JCPLL_CKOUT,

drivers/phy/phy-airoha-pcie.c

626

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_PXP_JCPLL_CKOUT,

drivers/phy/phy-airoha-pcie.c

628

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_PXP_JCPLL_CKOUT,

drivers/phy/phy-airoha-pcie.c

632

static void airoha_pcie_phy_txpll(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

634

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

637

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

640

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

643

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

647

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_TXPLL_REFIN_DIV,

drivers/phy/phy-airoha-pcie.c

649

writel(0x0, pcie_phy->csr_2l + REG_CSR_2L_TXPLL_SSC_DELTA1);

drivers/phy/phy-airoha-pcie.c

650

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_SSC_PERIOD,

drivers/phy/phy-airoha-pcie.c

652

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_CHP_IOFST,

drivers/phy/phy-airoha-pcie.c

654

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_750M_SYS_CK,

drivers/phy/phy-airoha-pcie.c

656

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_REFIN_DIV,

drivers/phy/phy-airoha-pcie.c

658

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_TCL_LPF_BW,

drivers/phy/phy-airoha-pcie.c

661

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_DA_PXP_CDR_PR_IDAC,

drivers/phy/phy-airoha-pcie.c

663

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_FORCE_DA_PXP_CDR_PR_IDAC,

drivers/phy/phy-airoha-pcie.c

665

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

669

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

674

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_SDM_DI_LS,

drivers/phy/phy-airoha-pcie.c

676

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_SSC,

drivers/phy/phy-airoha-pcie.c

678

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_REFIN_DIV,

drivers/phy/phy-airoha-pcie.c

680

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_SDM_DI_LS,

drivers/phy/phy-airoha-pcie.c

682

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_SDM_DI_LS,

drivers/phy/phy-airoha-pcie.c

684

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_TCL_KBAND_VREF,

drivers/phy/phy-airoha-pcie.c

686

writel(0x0, pcie_phy->csr_2l + REG_CSR_2L_TXPLL_SSC_DELTA1);

drivers/phy/phy-airoha-pcie.c

687

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_CHP_IOFST,

drivers/phy/phy-airoha-pcie.c

689

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_CHP_IOFST,

drivers/phy/phy-airoha-pcie.c

691

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_CHP_IOFST,

drivers/phy/phy-airoha-pcie.c

693

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_CHP_IOFST,

drivers/phy/phy-airoha-pcie.c

695

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_750M_SYS_CK,

drivers/phy/phy-airoha-pcie.c

697

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_TCL_VTP,

drivers/phy/phy-airoha-pcie.c

699

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_LPF_BWR,

drivers/phy/phy-airoha-pcie.c

701

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_POSTDIV,

drivers/phy/phy-airoha-pcie.c

703

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_REFIN_DIV,

drivers/phy/phy-airoha-pcie.c

705

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_TXPLL_TCL_LPF_BW,

drivers/phy/phy-airoha-pcie.c

707

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_VCO_SCAPWR,

drivers/phy/phy-airoha-pcie.c

709

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_TCL_LPF_BW,

drivers/phy/phy-airoha-pcie.c

712

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

715

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

719

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_SSC,

drivers/phy/phy-airoha-pcie.c

721

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_LPF_BWR,

drivers/phy/phy-airoha-pcie.c

723

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_TXPLL_PHY_CK2,

drivers/phy/phy-airoha-pcie.c

725

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_TCL_KBAND_VREF,

drivers/phy/phy-airoha-pcie.c

727

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_VTP,

drivers/phy/phy-airoha-pcie.c

729

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_POSTDIV,

drivers/phy/phy-airoha-pcie.c

731

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_TXPLL_PHY_CK2,

drivers/phy/phy-airoha-pcie.c

733

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_SSC,

drivers/phy/phy-airoha-pcie.c

735

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_750M_SYS_CK,

drivers/phy/phy-airoha-pcie.c

737

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_POSTDIV,

drivers/phy/phy-airoha-pcie.c

739

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_TXPLL_KBAND_DIV,

drivers/phy/phy-airoha-pcie.c

741

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_KBAND_DIV,

drivers/phy/phy-airoha-pcie.c

743

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_KBAND_DIV,

drivers/phy/phy-airoha-pcie.c

745

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_KBAND_DIV,

drivers/phy/phy-airoha-pcie.c

747

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_LPF_BWR,

drivers/phy/phy-airoha-pcie.c

749

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_TXPLL_SDM_OUT,

drivers/phy/phy-airoha-pcie.c

751

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_TXPLL_TCL_AMP_VREF,

drivers/phy/phy-airoha-pcie.c

753

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

756

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_SDM_OUT,

drivers/phy/phy-airoha-pcie.c

758

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

761

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_TXPLL_TCL_LPF_BW,

drivers/phy/phy-airoha-pcie.c

764

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

767

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

770

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

773

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

776

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

779

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

782

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

785

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

790

static void airoha_pcie_phy_init_ssc_jcpll(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

792

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_SSC_DELTA1,

drivers/phy/phy-airoha-pcie.c

794

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_SSC_DELTA1,

drivers/phy/phy-airoha-pcie.c

796

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_SSC_PERIOD,

drivers/phy/phy-airoha-pcie.c

798

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SSC,

drivers/phy/phy-airoha-pcie.c

800

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SSC,

drivers/phy/phy-airoha-pcie.c

802

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SDM_IFM,

drivers/phy/phy-airoha-pcie.c

804

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SDM_HREN,

drivers/phy/phy-airoha-pcie.c

806

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_RST_DLY,

drivers/phy/phy-airoha-pcie.c

808

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SSC,

drivers/phy/phy-airoha-pcie.c

813

airoha_pcie_phy_set_rxlan0_signal_detect(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

815

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_CDR0_PR_COR_HBW,

drivers/phy/phy-airoha-pcie.c

820

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_19,

drivers/phy/phy-airoha-pcie.c

822

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_20,

drivers/phy/phy-airoha-pcie.c

824

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_20,

drivers/phy/phy-airoha-pcie.c

827

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX0_SIGDET_DCTEST,

drivers/phy/phy-airoha-pcie.c

829

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX0_SIGDET_VTH_SEL,

drivers/phy/phy-airoha-pcie.c

83

#define airoha_phy_csr_2l_clear_bits(pcie_phy, reg, mask) \

drivers/phy/phy-airoha-pcie.c

831

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX0_REV0,

drivers/phy/phy-airoha-pcie.c

833

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX0_SIGDET_DCTEST,

drivers/phy/phy-airoha-pcie.c

836

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_CAL2,

drivers/phy/phy-airoha-pcie.c

839

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_PXP_RX0_FE_VB_EQ2,

drivers/phy/phy-airoha-pcie.c

84

airoha_phy_clear_bits((pcie_phy)->csr_2l + (reg), (mask))

drivers/phy/phy-airoha-pcie.c

842

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

845

airoha_phy_pma0_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

848

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_RX_FORCE_MODE0,

drivers/phy/phy-airoha-pcie.c

85

#define airoha_phy_csr_2l_set_bits(pcie_phy, reg, mask) \

drivers/phy/phy-airoha-pcie.c

850

airoha_phy_pma0_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_SIGDET0,

drivers/phy/phy-airoha-pcie.c

852

airoha_phy_pma0_clear_bits(pcie_phy, REG_PCIE_PMA_SEQUENCE_DISB_CTRL1,

drivers/phy/phy-airoha-pcie.c

855

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

859

airoha_phy_pma0_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

86

airoha_phy_set_bits((pcie_phy)->csr_2l + (reg), (mask))

drivers/phy/phy-airoha-pcie.c

865

airoha_pcie_phy_set_rxlan1_signal_detect(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

867

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_CDR1_PR_COR_HBW,

drivers/phy/phy-airoha-pcie.c

87

#define airoha_phy_csr_2l_update_field(pcie_phy, reg, mask, val) \

drivers/phy/phy-airoha-pcie.c

872

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_19,

drivers/phy/phy-airoha-pcie.c

874

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_20,

drivers/phy/phy-airoha-pcie.c

876

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_DIG_RESERVE_20,

drivers/phy/phy-airoha-pcie.c

879

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX1_SIGDET_NOVTH,

drivers/phy/phy-airoha-pcie.c

88

airoha_phy_update_field((pcie_phy)->csr_2l + (reg), (mask), (val))

drivers/phy/phy-airoha-pcie.c

881

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX1_SIGDET_NOVTH,

drivers/phy/phy-airoha-pcie.c

883

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX1_REV0,

drivers/phy/phy-airoha-pcie.c

885

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX1_DAC_RANGE_EYE,

drivers/phy/phy-airoha-pcie.c

888

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_CAL2,

drivers/phy/phy-airoha-pcie.c

89

#define airoha_phy_pma0_clear_bits(pcie_phy, reg, mask) \

drivers/phy/phy-airoha-pcie.c

891

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_RX1_FE_VB_EQ1,

drivers/phy/phy-airoha-pcie.c

894

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

897

airoha_phy_pma1_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

90

airoha_phy_clear_bits((pcie_phy)->pma0 + (reg), (mask))

drivers/phy/phy-airoha-pcie.c

900

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_RX_FORCE_MODE0,

drivers/phy/phy-airoha-pcie.c

902

airoha_phy_pma1_update_field(pcie_phy, REG_PCIE_PMA_SS_RX_SIGDET0,

drivers/phy/phy-airoha-pcie.c

904

airoha_phy_pma1_clear_bits(pcie_phy, REG_PCIE_PMA_SEQUENCE_DISB_CTRL1,

drivers/phy/phy-airoha-pcie.c

907

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

91

#define airoha_phy_pma1_clear_bits(pcie_phy, reg, mask) \

drivers/phy/phy-airoha-pcie.c

911

airoha_phy_pma1_clear_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

916

static void airoha_pcie_phy_set_rxflow(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

918

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

92

airoha_phy_clear_bits((pcie_phy)->pma1 + (reg), (mask))

drivers/phy/phy-airoha-pcie.c

922

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

927

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

93

#define airoha_phy_pma0_set_bits(pcie_phy, reg, mask) \

drivers/phy/phy-airoha-pcie.c

931

airoha_phy_pma0_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

935

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

939

airoha_phy_pma1_set_bits(pcie_phy,

drivers/phy/phy-airoha-pcie.c

94

airoha_phy_set_bits((pcie_phy)->pma0 + (reg), (mask))

drivers/phy/phy-airoha-pcie.c

944

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_RX0_PHYCK_DIV,

drivers/phy/phy-airoha-pcie.c

947

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_RX1_PHYCK_DIV,

drivers/phy/phy-airoha-pcie.c

95

#define airoha_phy_pma1_set_bits(pcie_phy, reg, mask) \

drivers/phy/phy-airoha-pcie.c

951

airoha_phy_pma0_set_bits(pcie_phy, REG_PCIE_PMA_SW_RESET,

drivers/phy/phy-airoha-pcie.c

955

airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_SW_RESET,

drivers/phy/phy-airoha-pcie.c

96

airoha_phy_set_bits((pcie_phy)->pma1 + (reg), (mask))

drivers/phy/phy-airoha-pcie.c

960

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_PXP_RX0_FE_VB_EQ2,

drivers/phy/phy-airoha-pcie.c

963

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_RX0_SIGDET_VTH_SEL,

drivers/phy/phy-airoha-pcie.c

965

airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_RX1_FE_VB_EQ1,

drivers/phy/phy-airoha-pcie.c

97

#define airoha_phy_pma0_update_field(pcie_phy, reg, mask, val) \

drivers/phy/phy-airoha-pcie.c

970

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX0_REV0,

drivers/phy/phy-airoha-pcie.c

972

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX0_REV0,

drivers/phy/phy-airoha-pcie.c

974

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX1_REV0,

drivers/phy/phy-airoha-pcie.c

976

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_RX1_REV0,

drivers/phy/phy-airoha-pcie.c

98

airoha_phy_update_field((pcie_phy)->pma0 + (reg), (mask), (val))

drivers/phy/phy-airoha-pcie.c

980

static void airoha_pcie_phy_set_pr(struct airoha_pcie_phy *pcie_phy)

drivers/phy/phy-airoha-pcie.c

982

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CDR0_PR_VREG_IBAND,

drivers/phy/phy-airoha-pcie.c

984

airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_CDR0_PR_VREG_IBAND,

drivers/phy/phy-airoha-pcie.c

987

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CDR0_PR_CKREF_DIV,

drivers/phy/phy-airoha-pcie.c

989

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CDR0_PR_COR_HBW,

drivers/phy/phy-airoha-pcie.c

99

#define airoha_phy_pma1_update_field(pcie_phy, reg, mask, val) \

drivers/phy/phy-airoha-pcie.c

992

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

995

airoha_phy_csr_2l_update_field(pcie_phy,

drivers/phy/phy-airoha-pcie.c

999

airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CDR1_PR_CKREF_DIV,