pcic
u32 pcic;
txx9_alloc_pci_controller(struct pci_controller *pcic,
pcicvalue = rc32434_pci->pcic;
rc32434_pci->pcic = pcicdata; /* Enable the PCI bus Interface */
pcicntlval = rc32434_pci->pcic;
rc32434_pci->pcic = pcicntlval;
pcicntlval = rc32434_pci->pcic;
val = __raw_readl(&pci_reg->pcic);
__raw_writel(val, (void *)&pci_reg->pcic);
txx9_alloc_pci_controller(struct pci_controller *pcic,
if (!pcic) {
pcic = &new->c;
BUG_ON(pcic != &txx9_primary_pcic);
pcic->io_resource->flags = IORESOURCE_IO;
pcic->mem_resource[0].start = mem_base;
pcic->mem_resource[0].end = mem_base + mem_size - 1;
if (request_resource(&iomem_resource, &pcic->mem_resource[0]))
&pcic->mem_resource[0],
pcic->mem_resource[1].flags = IORESOURCE_MEM | IORESOURCE_BUSY;
pcic->mem_resource[1].start = io_base;
pcic->mem_resource[1].end = io_base + io_size - 1;
if (request_resource(&iomem_resource, &pcic->mem_resource[1]))
&pcic->mem_resource[1],
io_base = pcic->mem_resource[1].start;
pcic->mem_resource[0].flags = IORESOURCE_MEM;
if (pcic == &txx9_primary_pcic &&
set_io_port_base(IO_BASE + pcic->mem_resource[1].start);
pcic->io_resource->start = 0;
pcic->io_offset = 0; /* busaddr == ioaddr */
pcic->io_map_base = IO_BASE + pcic->mem_resource[1].start;
pcic->io_resource->start =
pcic->io_offset = io_base - (mips_io_port_base - IO_BASE);
pcic->io_map_base = mips_io_port_base;
pcic->io_resource->end = pcic->io_resource->start + io_size - 1;
pcic->mem_offset = 0; /* busaddr == physaddr */
pr_info("PCI: IO %pR MEM %pR\n", &pcic->mem_resource[1],
&pcic->mem_resource[0]);
release_resource(&pcic->mem_resource[0]);
return pcic;
release_resource(&pcic->mem_resource[0]);
struct linux_pcic *pcic;
pcic = &pcic0;
writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr);
*value = readl(pcic->pcic_config_space_data + (where&4));
struct linux_pcic *pcic;
pcic = &pcic0;
writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr);
writel(value, pcic->pcic_config_space_data + (where&4));
struct linux_pcic *pcic;
pcic = &pcic0;
pcic->pcic_res_regs.name = "pcic_registers";
pcic->pcic_regs = ioremap(regs[0].phys_addr, regs[0].reg_size);
if (!pcic->pcic_regs) {
pcic->pcic_res_io.name = "pcic_io";
if ((pcic->pcic_io = (unsigned long)
pcic->pcic_res_cfg_addr.name = "pcic_cfg_addr";
if ((pcic->pcic_config_space_addr =
pcic->pcic_res_cfg_data.name = "pcic_cfg_data";
if ((pcic->pcic_config_space_data =
pbm = &pcic->pbm;
pcic_regs = pcic->pcic_regs;
pcic->pcic_imap = p->intmap;
pcic->pcic_imdim = p->mapdim;
if (pcic->pcic_imap == NULL) {
static void __init pcic_pbm_scan_bus(struct linux_pcic *pcic)
struct linux_pbm_info *pbm = &pcic->pbm;
struct linux_pcic *pcic;
pcic = &pcic0;
pcic->pcic_regs+PCI_DVMA_CONTROL);
writel(0xF0000000UL, pcic->pcic_regs+PCI_SIZE_0);
pcic->pcic_regs+PCI_BASE_ADDRESS_0);
pcic_pbm_scan_bus(pcic);
static void pcic_map_pci_device(struct linux_pcic *pcic,
pcic->pcic_io + address;
pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node)
if ((p = pcic->pcic_imap) == NULL) {
for (i = 0; i < pcic->pcic_imdim; i++) {
if (i >= pcic->pcic_imdim) {
pcic->pcic_imdim);
ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_HI);
ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_LO);
struct linux_pcic *pcic;
pcic = &pcic0;
node = pdev_to_pnode(&pcic->pbm, dev);
pcp->pbm = &pcic->pbm;
pcic_map_pci_device(pcic, dev, node);
pcic_fill_irq(pcic, dev, node);
struct linux_pcic *pcic = &pcic0;
writel (TICK_TIMER_LIMIT, pcic->pcic_regs+PCI_SYS_LIMIT);
v = readb(pcic->pcic_regs+PCI_COUNTER_IRQ);
pcic->pcic_regs+PCI_COUNTER_IRQ);
writeb(0, pcic->pcic_regs+PCI_SYS_STATUS);
u32 pcic;
pci_read_config_dword(dev, 0x4C, &pcic);
if ((pcic & 6) != 6) {
pcic |= 6;
pci_write_config_dword(dev, 0x4C, pcic);
pci_read_config_dword(dev, 0x84, &pcic);
pcic |= (1 << 23); /* Required in this mode */
pci_write_config_dword(dev, 0x84, pcic);
pcic[s->type].name, s->psock);
static struct pcic pcic[] = {
#define PCIC_COUNT ARRAY_SIZE(pcic)
socket[sockets].flags = pcic[type].flags;
printk(KERN_INFO " %s", pcic[type].name);