pci_set_power_state
pci_set_power_state(dev, PCI_D0);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(dev, PCI_D3hot);
pci_set_power_state(hdev->pdev, PCI_D0);
pci_set_power_state(hdev->pdev, PCI_D3hot);
pci_set_power_state(hdev->pdev, PCI_D3hot);
pci_set_power_state(hdev->pdev, PCI_D0);
pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);
pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);
pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D0);
pci_set_power_state(qdev->pdev, PCI_D3hot);
pci_set_power_state(qdev->pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3cold);
pci_set_power_state(pdev, PCI_D3cold);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
ret = pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3cold);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3cold);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3cold);
err = pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3cold);
pci_set_power_state(pdev, PCI_D3hot);
err = pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
if (pci_set_power_state(pci_dev,
err = pci_set_power_state(pci_dev, PCI_D0);
pci_set_power_state(pdev, device_state);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3cold);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */
pci_set_power_state(VORTEX_PCI(vp), PCI_D0);
pci_set_power_state(VORTEX_PCI(vp), state);
pci_set_power_state(VORTEX_PCI(vp), PCI_D3hot);
pci_set_power_state(pdev, PCI_D0); /* Go active */
return pci_set_power_state(tp->pdev, state);
pci_set_power_state(tp->pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot); /* go to sleep in D3 mode */
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, pci_choose_state(pdev, state));
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, pci_choose_state(pdev, state));
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(bp->pdev, PCI_D0);
pci_set_power_state(bp->pdev, PCI_D3hot);
pci_set_power_state(bp->pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(tp->pdev, PCI_D3hot);
err = pci_set_power_state(tp->pdev, PCI_D0);
pci_set_power_state(tp->pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state (cp->pdev, PCI_D3hot);
pci_set_power_state (pdev, PCI_D0);
return pci_set_power_state(pci_dev, PCI_D3hot);
rc = pci_set_power_state(pci_dev, PCI_D0);
return pci_set_power_state(pci_dev, PCI_D3hot);
rc = pci_set_power_state(pci_dev, PCI_D0);
return pci_set_power_state(pci_dev, PCI_D3hot);
rc = pci_set_power_state(pci_dev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(vptr->pdev, state);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
return pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3cold);
pci_set_power_state(pdev, PCI_D0);
err = pci_set_power_state(pdev, pci_choose_state(pdev, state));
err = pci_set_power_state(pdev, PCI_D0);
return pci_set_power_state(pdev, pci_choose_state(pdev, state));
err = pci_set_power_state(pdev, PCI_D0);
err = pci_set_power_state(pdev, pci_choose_state(pdev, state));
err = pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, PCI_D3hot);
if (pci_set_power_state(pdev, PCI_D0))
int error = pci_set_power_state(pci_dev, PCI_D0);
EXPORT_SYMBOL(pci_set_power_state);
err = pci_set_power_state(dev, PCI_D0);
error = pci_set_power_state(dev, target_state);
int ret = pci_set_power_state(dev, PCI_D0);
error = pci_set_power_state(dev, target_state);
pci_set_power_state(dev, PCI_D0);
pci_set_power_state(pcidev, PCI_D3hot);
pci_set_power_state(ahd->dev_softc, new_state);
pci_set_power_state(ahc->dev_softc, AHC_POWER_STATE_D0);
pci_set_power_state(pdev, PCI_D0);
rc = pci_set_power_state(pdev, PCI_D3hot);
rc = pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(pdev, pci_choose_state(pdev, state));
pci_set_power_state(pdev, PCI_D0);
pci_set_power_state(dev, pci_choose_state(dev, state));
pci_set_power_state(dev, PCI_D0);
pci_set_power_state(dev, PCI_D3hot);
pci_set_power_state(pdev, PCI_D3hot);
ret = pci_set_power_state(pdev, state);
pci_set_power_state(dev, pci_choose_state(dev, mesg));
pci_set_power_state(dev, PCI_D0);
pci_set_power_state(dev, PCI_D0);
err = pci_set_power_state(dev, new_state);
int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
pci_set_power_state(sdev->bus->host_pci, state);
pci_set_power_state(pci, PCI_D3hot);
pci_set_power_state(pci, PCI_D0);