drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

103

pci1xxx_assign_bit(priv->reg_base, INP_EN_OFFSET(nr), (nr % 32), true);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

104

pci1xxx_assign_bit(priv->reg_base, OUT_EN_OFFSET(nr), (nr % 32), false);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

125

pci1xxx_assign_bit(priv->reg_base, INP_EN_OFFSET(nr), (nr % 32), false);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

126

pci1xxx_assign_bit(priv->reg_base, OUT_EN_OFFSET(nr), (nr % 32), true);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

144

pci1xxx_assign_bit(priv->reg_base, OUT_OFFSET(nr), (nr % 32), val);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

160

pci1xxx_assign_bit(priv->reg_base, PULLUP_OFFSET(offset), (offset % 32), true);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

163

pci1xxx_assign_bit(priv->reg_base, PULLDOWN_OFFSET(offset), (offset % 32), true);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

166

pci1xxx_assign_bit(priv->reg_base, PULLUP_OFFSET(offset), (offset % 32), false);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

167

pci1xxx_assign_bit(priv->reg_base, PULLDOWN_OFFSET(offset), (offset % 32), false);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

170

pci1xxx_assign_bit(priv->reg_base, OPENDRAIN_OFFSET(offset), (offset % 32), true);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

173

pci1xxx_assign_bit(priv->reg_base, OPENDRAIN_OFFSET(offset), (offset % 32), false);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

206

pci1xxx_assign_bit(priv->reg_base, INTR_MASK_OFFSET(gpio), (gpio % 32), set);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

230

pci1xxx_assign_bit(priv->reg_base, INTR_HI_TO_LO_EDGE_CONFIG(gpio),

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

232

pci1xxx_assign_bit(priv->reg_base, MODE_OFFSET(gpio),

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

236

pci1xxx_assign_bit(priv->reg_base, INTR_HI_TO_LO_EDGE_CONFIG(gpio),

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

241

pci1xxx_assign_bit(priv->reg_base, INTR_LO_TO_HI_EDGE_CONFIG(gpio),

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

243

pci1xxx_assign_bit(priv->reg_base, MODE_OFFSET(gpio), bitpos,

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

247

pci1xxx_assign_bit(priv->reg_base, INTR_LO_TO_HI_EDGE_CONFIG(gpio),

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

252

pci1xxx_assign_bit(priv->reg_base, INTR_LEVEL_CONFIG_OFFSET(gpio),

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

254

pci1xxx_assign_bit(priv->reg_base, INTR_LEVEL_MASK_OFFSET(gpio),

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

256

pci1xxx_assign_bit(priv->reg_base, MODE_OFFSET(gpio), bitpos,

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

262

pci1xxx_assign_bit(priv->reg_base, INTR_LEVEL_CONFIG_OFFSET(gpio),

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

264

pci1xxx_assign_bit(priv->reg_base, INTR_LEVEL_MASK_OFFSET(gpio),

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

266

pci1xxx_assign_bit(priv->reg_base, MODE_OFFSET(gpio), bitpos,

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

272

pci1xxx_assign_bit(priv->reg_base, INTR_LEVEL_MASK_OFFSET(gpio), bitpos, true);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

305

pci1xxx_assign_bit(priv->reg_base, PIO_GLOBAL_CONFIG_OFFSET, 16, true);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

328

pci1xxx_assign_bit(priv->reg_base, PIO_GLOBAL_CONFIG_OFFSET, 16, false);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

361

pci1xxx_assign_bit(priv->reg_base,

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

369

pci1xxx_assign_bit(priv->reg_base, PIO_GLOBAL_CONFIG_OFFSET,

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

371

pci1xxx_assign_bit(priv->reg_base, PIO_GLOBAL_CONFIG_OFFSET,

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

373

pci1xxx_assign_bit(priv->reg_base, PERI_GEN_RESET, 16, true);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

376

pci1xxx_assign_bit(priv->reg_base, PERI_GEN_RESET, 17, true);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

404

pci1xxx_assign_bit(priv->reg_base,

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

412

pci1xxx_assign_bit(priv->reg_base, PIO_GLOBAL_CONFIG_OFFSET,

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

414

pci1xxx_assign_bit(priv->reg_base, PIO_GLOBAL_CONFIG_OFFSET,

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

416

pci1xxx_assign_bit(priv->reg_base, PERI_GEN_RESET, 16, false);

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c

419

pci1xxx_assign_bit(priv->reg_base, PERI_GEN_RESET, 17, false);