omap_readl
val = omap_readl(DEFERRED_FIQ_IH_BASE + offset) & ~(1 << 1);
val = omap_readl(OMAP_IH1_BASE + offset) | 1;
l = omap_readl(EMIFS_CCS(1));
seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
l = omap_readl(EMIFS_CCS(3));
l = omap_readl(USB_TRANSCEIVER_CTRL);
l = omap_readl(MOD_CONF_CTRL_1);
u32 div = omap_readl(MOD_CONF_CTRL_1);
omap_writel(omap_readl(MOD_CONF_CTRL_0) |
omap_writel(omap_readl(ULPD_CLOCK_CTRL) |
omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
l = omap_readl(EMIFS_CONFIG);
omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
die_rev = omap_readl(OMAP_DIE_ID_1);
die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf;
omap_id = omap_readl(OMAP32_ID_0);
printk(KERN_DEBUG "OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
omap_readl(OMAP_DIE_ID_1),
(omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
omap_readl(OMAP_PRODUCTION_ID_0));
omap_readl(OMAP_PRODUCTION_ID_1),
omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
printk(KERN_DEBUG "OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
printk(KERN_DEBUG "OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
system_serial_high = omap_readl(OMAP_DIE_ID_0);
system_serial_low = omap_readl(OMAP_DIE_ID_1);
prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
omap_id = omap_readl(OMAP32_ID_1);
EXPORT_SYMBOL(omap_readl);
(omap_readl(OMAP_IH1_ITR) & ~omap_readl(OMAP_IH1_MIR))
reg_orig = omap_readl(cfg->mux_reg);
pu_pd_orig = omap_readl(cfg->pu_pd_reg);
pull_orig = omap_readl(cfg->pull_reg);
val = omap_readl(OCPI_PROT);
val = omap_readl(OCPI_SEC);
l = omap_readl(reg);
l = omap_readl(reg);
__u32 saved_idlect1 = omap_readl(ARM_IDLECT1);
omap_sram_suspend(omap_readl(ARM_IDLECT1),
omap_readl(ARM_IDLECT2));
#define ARM_SAVE(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] = omap_readl(x)
#define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x)
#define MPUI1610_SAVE(x) mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x] = omap_readl(x)
l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
syscon = omap_readl(OTG_SYSCON_1);
pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
l = omap_readl(USB_TRANSCEIVER_CTRL);
l = omap_readl(USB_TRANSCEIVER_CTRL);
l = omap_readl(USB_TRANSCEIVER_CTRL);
l = omap_readl(USB_TRANSCEIVER_CTRL);
l = omap_readl(USB_TRANSCEIVER_CTRL);
l = omap_readl(USB_TRANSCEIVER_CTRL);
l = omap_readl(USB_TRANSCEIVER_CTRL);
l = omap_readl(USB_TRANSCEIVER_CTRL);
omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
omap_readl(USB_TRANSCEIVER_CTRL));
pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
l = omap_readl(OTG_CTRL);
l = omap_readl(OTG_CTRL);
l = omap_readl(FUNC_MUX_CTRL_0);
if (omap_readl(OTG_CTRL) & OTG_ID)
l = omap_readl(OTG_CTRL);
tmp = omap_readl(OTG_REV);
tmp = omap_readl(OTG_SYSCON_2);
tmp = omap_readl(OTG_CTRL);
u32 tmp = omap_readl(FUNC_MUX_CTRL_0);
#define HMC_1510 ((omap_readl(MOD_CONF_CTRL_0) >> 1) & 0x3f)
#define HMC_1610 (omap_readl(OTG_SYSCON_2) & 0x3f)
l = omap_readl(OTG_CTRL);
l = omap_readl(OMAP_LCDC_CONTROL);
l = omap_readl(OMAP_LCDC_CONTROL);
status = omap_readl(OMAP_LCDC_STATUS);
l = omap_readl(OMAP_LCDC_CONTROL);
l = omap_readl(OMAP_LCDC_CONTROL);
l = omap_readl(OMAP_LCDC_TIMING2);
l = omap_readl(OMAP_LCDC_TIMING2);
l = omap_readl(OMAP_LCDC_CONTROL);
l = omap_readl(MOD_CONF_CTRL_1);
l = omap_readl(ARM_IDLECT2);
extern u32 omap_readl(u32 pa);