ocp_reg_read
return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
return ocp_reg_read(tp, OCP_SRAM_DATA);
data = ocp_reg_read(tp, addr);
return ocp_reg_read(tp, OCP_SRAM2_DATA);
data = ocp_reg_read(tp, OCP_PHY_STATUS);
ocp_data = ocp_reg_read(tp, OCP_PHY_PATCH_STAT);
!(ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)) {
data = ocp_reg_read(tp, addr);
data = ocp_reg_read(tp, OCP_EEE_DATA);
config = ocp_reg_read(tp, OCP_EEE_ADV2);
ocp_data = ocp_reg_read(tp, 0xc426);
orig = ocp_reg_read(tp, OCP_10GBT_CTRL);
u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
data = ocp_reg_read(tp, 0xa5b4);
(ocp_reg_read(tp, 0xd068) & BIT(1))) {
data = ocp_reg_read(tp, 0xd068);
swap_a = ocp_reg_read(tp, 0xd06a);
swap_b = ocp_reg_read(tp, 0xd06a);
swap_a = ocp_reg_read(tp, 0xd06a);
swap_b = ocp_reg_read(tp, 0xd06a);
swap_a = ocp_reg_read(tp, 0xbd5a);
swap_b = ocp_reg_read(tp, 0xbd5c);
swap_a = ocp_reg_read(tp, 0xbc18);
swap_b = ocp_reg_read(tp, 0xbc1a);
u16 ocp_10gbt_ctrl = ocp_reg_read(tp, OCP_10GBT_CTRL);
u16 ocp_10gbt_stat = ocp_reg_read(tp, OCP_10GBT_STAT);
val = ocp_reg_read(tp, OCP_EEE_ABLE);
val = ocp_reg_read(tp, OCP_EEE_ADV);
val = ocp_reg_read(tp, OCP_EEE_LPABLE);
val = ocp_reg_read(tp, OCP_EEE_ADV2);
val = ocp_reg_read(tp, OCP_EEE_LPABLE2);