drivers/crypto/marvell/octeontx2/cn10k_cpt.c

207

otx2_cpt_write64(lfs->reg_base, lfs->blkaddr, lfs->lf[0].slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

176

otx2_cpt_write64(lfs->reg_base, lfs->blkaddr, slot, reg,

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

187

otx2_cpt_write64(lfs->reg_base, lfs->blkaddr, slot, reg, 0x1);

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

19

otx2_cpt_write64(lf->lfs->reg_base, lf->lfs->blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

239

otx2_cpt_write64(lf->lfs->reg_base, lf->lfs->blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

257

otx2_cpt_write64(lf->lfs->reg_base, lf->lfs->blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

260

otx2_cpt_write64(lf->lfs->reg_base, lf->lfs->blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

30

otx2_cpt_write64(lf->lfs->reg_base, lf->lfs->blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

199

otx2_cpt_write64(lfs->reg_base, lfs->blkaddr, slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

210

otx2_cpt_write64(lf->lfs->reg_base, lf->lfs->blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

241

otx2_cpt_write64(reg_base, blkaddr, slot, OTX2_CPT_LF_CTL, 0x0);

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

245

otx2_cpt_write64(reg_base, blkaddr, slot, OTX2_CPT_LF_INPROG, inprog);

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

300

otx2_cpt_write64(lf->lfs->reg_base, blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

320

otx2_cpt_write64(lf->lfs->reg_base, blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

333

otx2_cpt_write64(lf->lfs->reg_base, blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

109

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

115

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

123

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

128

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

169

otx2_cpt_write64(pf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

171

otx2_cpt_write64(pf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

198

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

201

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

226

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

229

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

27

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

29

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

34

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

41

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

417

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT_ENA_W1C,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

420

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, 0x1ULL);

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

439

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, 0x1ULL);

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

441

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT_ENA_W1S,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

53

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

55

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

58

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

65

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

76

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_VFFLR_INTX(0),

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

80

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

83

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_VFME_INTX(0),

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

86

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

92

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_VFFLR_INTX(1),

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

94

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

97

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_VFME_INTX(1),

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

99

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

363

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM,

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

443

otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT,

drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c

16

otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, OTX2_RVU_VF_INT,

drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c

20

otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c

27

otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c

31

otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, OTX2_RVU_VF_INT,

drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c

63

otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0,