drivers/crypto/marvell/octeontx2/cn10k_cpt.c

211

otx2_cpt_read64(lfs->reg_base, lfs->blkaddr, lfs->lf[0].slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

16

done_wait.u = otx2_cpt_read64(lf->lfs->reg_base, lf->lfs->blkaddr,

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

194

irq_cnt.u = otx2_cpt_read64(lf->lfs->reg_base, lf->lfs->blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

206

irq_misc.u = otx2_cpt_read64(lf->lfs->reg_base, lf->lfs->blkaddr,

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

254

done_wait.u = otx2_cpt_read64(lf->lfs->reg_base, lf->lfs->blkaddr,

drivers/crypto/marvell/octeontx2/otx2_cptlf.c

27

done_wait.u = otx2_cpt_read64(lf->lfs->reg_base, lf->lfs->blkaddr,

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

243

inprog = otx2_cpt_read64(reg_base, blkaddr, slot, OTX2_CPT_LF_INPROG);

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

247

qsize = otx2_cpt_read64(reg_base, blkaddr, slot, OTX2_CPT_LF_Q_SIZE) & 0x7FFF;

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

249

inst_ptr = otx2_cpt_read64(reg_base, blkaddr, slot, OTX2_CPT_LF_Q_INST_PTR);

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

262

inprog = otx2_cpt_read64(reg_base, blkaddr, slot, OTX2_CPT_LF_INPROG);

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

295

lf_ctl.u = otx2_cpt_read64(lf->lfs->reg_base, blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

315

lf_inprog.u = otx2_cpt_read64(lf->lfs->reg_base, blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptlf.h

329

val = otx2_cpt_read64(lf->lfs->reg_base, blkaddr, lf->slot,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

187

intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

219

intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

577

rev = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

614

cfg = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

354

intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0,

drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c

426

intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT);

drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c

56

intr = otx2_cpt_read64(cptvf->reg_base, BLKADDR_RVUM, 0,