orion_spi
static struct platform_device orion_spi = {
fill_resources(&orion_spi, &orion_spi_resources,
platform_device_register(&orion_spi);
static inline void __iomem *spi_reg(struct orion_spi *orion_spi, u32 reg)
return orion_spi->base + reg;
orion_spi_setbits(struct orion_spi *orion_spi, u32 reg, u32 mask)
void __iomem *reg_addr = spi_reg(orion_spi, reg);
orion_spi_clrbits(struct orion_spi *orion_spi, u32 reg, u32 mask)
void __iomem *reg_addr = spi_reg(orion_spi, reg);
struct orion_spi *orion_spi;
orion_spi = spi_controller_get_devdata(spi->controller);
devdata = orion_spi->devdata;
tclk_hz = clk_get_rate(orion_spi->clk);
reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
struct orion_spi *orion_spi;
orion_spi = spi_controller_get_devdata(spi->controller);
reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
struct orion_spi *orion_spi;
orion_spi = spi_controller_get_devdata(spi->controller);
reg = readl(spi_reg(orion_spi, ORION_SPI_TIMING_PARAMS_REG));
if (clk_get_rate(orion_spi->clk) == 250000000 &&
writel(reg, spi_reg(orion_spi, ORION_SPI_TIMING_PARAMS_REG));
struct orion_spi *orion_spi;
orion_spi = spi_controller_get_devdata(spi->controller);
if (orion_spi->devdata->is_errata_50mhz_ac)
orion_spi_setbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
orion_spi_clrbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
struct orion_spi *orion_spi;
orion_spi = spi_controller_get_devdata(spi->controller);
ctrl_reg = spi_reg(orion_spi, ORION_SPI_IF_CTRL_REG);
static inline int orion_spi_wait_till_ready(struct orion_spi *orion_spi)
if (readl(spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG)))
struct orion_spi *orion_spi;
orion_spi = spi_controller_get_devdata(spi->controller);
tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
if (orion_spi_wait_till_ready(orion_spi) < 0) {
struct orion_spi *orion_spi;
orion_spi = spi_controller_get_devdata(spi->controller);
tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
if (orion_spi_wait_till_ready(orion_spi) < 0) {
struct orion_spi *orion_spi;
orion_spi = spi_controller_get_devdata(spi->controller);
vaddr = orion_spi->child[cs].direct_access.vaddr;
struct orion_spi *orion_spi = spi_controller_get_devdata(spi->controller);
struct device *dev = orion_spi->dev;
static int orion_spi_reset(struct orion_spi *orion_spi)
orion_spi_clrbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1);
writel(0, spi_reg(orion_spi, SPI_DIRECT_WRITE_CONFIG_REG));
struct orion_spi *spi;
struct orion_spi *spi = spi_controller_get_devdata(host);
struct orion_spi *spi = spi_controller_get_devdata(host);
struct orion_spi *spi = spi_controller_get_devdata(host);