drivers/gpu/drm/nouveau/include/nvkm/core/layout.h

52

NVKM_LAYOUT_ONCE(NVKM_ENGINE_SW , struct nvkm_sw , sw)

drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h

13

bool nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data);

drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h

15

int nv04_sw_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sw **);

drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h

16

int nv10_sw_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sw **);

drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h

17

int nv50_sw_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sw **);

drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h

18

int gf100_sw_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sw **);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c

276

struct nvkm_sw *sw = device->sw;

drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c

101

struct nvkm_sw *sw;

drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c

108

return nvkm_engine_ctor(&nvkm_sw, device, type, inst, true, &sw->engine);

drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c

30

nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data)

drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c

61

struct nvkm_sw *sw = nvkm_sw(oclass->engine);

drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c

80

struct nvkm_sw *sw = nvkm_sw(oclass->engine);

drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c

87

return nvkm_sw(engine);

drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c

91

nvkm_sw = {

drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c

99

enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw)

drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c

56

struct nvkm_sw *sw = chan->sw;

drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c

76

nvkm_sw_chan_ctor(const struct nvkm_sw_chan_func *func, struct nvkm_sw *sw,

drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.h

13

struct nvkm_sw *sw;

drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.h

26

int nvkm_sw_chan_ctor(const struct nvkm_sw_chan_func *, struct nvkm_sw *,

drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c

105

gf100_sw_chan_new(struct nvkm_sw *sw, struct nvkm_chan *fifoch,

drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c

144

gf100_sw_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw)

drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c

43

struct nvkm_sw *sw = chan->base.sw;

drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c

109

nv04_sw_chan_new(struct nvkm_sw *sw, struct nvkm_chan *fifo,

drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c

136

nv04_sw_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw)

drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c

39

nv10_sw_chan_new(struct nvkm_sw *sw, struct nvkm_chan *fifo,

drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c

65

nv10_sw_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw)

drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c

102

nv50_sw_chan_new(struct nvkm_sw *sw, struct nvkm_chan *fifoch,

drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c

139

nv50_sw_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw)

drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c

43

struct nvkm_sw *sw = chan->base.sw;

drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h

18

int (*chan_new)(struct nvkm_sw *, struct nvkm_chan *,

drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h

4

#define nvkm_sw(p) container_of((p), struct nvkm_sw, engine)

drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h

9

struct nvkm_sw **);