drivers/gpu/drm/nouveau/dispnv04/dac.c

275

nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, dcb->type == DCB_OUTPUT_TV);

drivers/gpu/drm/nouveau/dispnv04/dac.c

276

nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, dcb->type == DCB_OUTPUT_TV);

drivers/gpu/drm/nouveau/dispnv04/dac.c

328

nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, saved_gpio1);

drivers/gpu/drm/nouveau/dispnv04/dac.c

329

nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, saved_gpio0);

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

124

nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, gpio1);

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

125

nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, gpio0);

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

397

nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, mode == DRM_MODE_DPMS_ON);

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

398

nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, mode == DRM_MODE_DPMS_ON);

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

78

nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC1, 0xff, true);

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

79

nvkm_gpio_set(gpio, 0, DCB_GPIO_TVDAC0, 0xff, true);

drivers/gpu/drm/nouveau/include/nvkm/subdev/gpio.h

32

int nvkm_gpio_set(struct nvkm_gpio *, int idx, u8 tag, u8 line, int state);

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c

562

nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 1);

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c

590

nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 0);

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/ga102.c

47

nvkm_gpio_set(gpio, 0, func, line, defs);

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gf119.c

47

nvkm_gpio_set(gpio, 0, func, line, defs);

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

51

nvkm_gpio_set(gpio, 0, func, line, defs);

drivers/gpu/drm/nouveau/nvkm/subdev/therm/fantog.c

54

nvkm_gpio_set(gpio, 0, DCB_GPIO_FAN, 0xff, duty);

drivers/gpu/drm/nouveau/nvkm/subdev/volt/gpio.c

62

int ret = nvkm_gpio_set(gpio, 0, tags[i], 0xff, vid & 1);