Symbol: nvkm_falcon_fw
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
100
int (*boot)(struct nvkm_falcon_fw *,
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
140
struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
143
struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
146
struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
147
int nvkm_falcon_fw_sign(struct nvkm_falcon_fw *, u32 sig_base_img, u32 sig_size, const u8 *sigs,
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
149
int nvkm_falcon_fw_patch(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
150
void nvkm_falcon_fw_dtor(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
151
int nvkm_falcon_fw_oneinit(struct nvkm_falcon_fw *, struct nvkm_falcon *, struct nvkm_vmm *,
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
153
int nvkm_falcon_fw_boot(struct nvkm_falcon_fw *, struct nvkm_subdev *user,
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
157
int gm200_flcn_fw_signature(struct nvkm_falcon_fw *, u32 *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
158
int gm200_flcn_fw_reset(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
159
int gm200_flcn_fw_load(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
160
int gm200_flcn_fw_boot(struct nvkm_falcon_fw *, u32 *, u32 *, u32, u32);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
162
int ga100_flcn_fw_signature(struct nvkm_falcon_fw *, u32 *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
165
int ga102_flcn_fw_load(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
166
int ga102_flcn_fw_boot(struct nvkm_falcon_fw *, u32 *, u32 *, u32, u32);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
95
int (*signature)(struct nvkm_falcon_fw *, u32 *sig_base_src);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
96
int (*reset)(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
97
int (*setup)(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
98
int (*load)(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h
99
int (*load_bld)(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
37
struct nvkm_falcon_fw vpr_scrubber;
drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
123
struct nvkm_falcon_fw load;
drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
124
struct nvkm_falcon_fw unload;
drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
82
struct nvkm_falcon_fw sb;
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
127
nvkm_falcon_fw_oneinit(struct nvkm_falcon_fw *fw, struct nvkm_falcon *falcon,
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
155
nvkm_falcon_fw_dtor(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
172
nvkm_falcon_fw = {
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
177
nvkm_falcon_fw_sign(struct nvkm_falcon_fw *fw, u32 sig_base_img, u32 sig_size, const u8 *sigs,
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
200
struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
202
const struct nvkm_firmware_func *type = dma ? &nvkm_falcon_fw_dma : &nvkm_falcon_fw;
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
217
struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
31
nvkm_falcon_fw_patch(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
310
struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
67
nvkm_falcon_fw_dtor_sigs(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
74
nvkm_falcon_fw_boot(struct nvkm_falcon_fw *fw, struct nvkm_subdev *user,
drivers/gpu/drm/nouveau/nvkm/falcon/ga100.c
31
ga100_flcn_fw_signature(struct nvkm_falcon_fw *fw, u32 *src_base_src)
drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c
113
ga102_flcn_fw_boot(struct nvkm_falcon_fw *fw, u32 *mbox0, u32 *mbox1, u32 mbox0_ok, u32 irqsclr)
drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c
126
ga102_flcn_fw_load(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c
218
gm200_flcn_fw_boot(struct nvkm_falcon_fw *fw, u32 *pmbox0, u32 *pmbox1, u32 mbox0_ok, u32 irqsclr)
drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c
249
gm200_flcn_fw_load(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c
318
gm200_flcn_fw_reset(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c
324
gm200_flcn_fw_signature(struct nvkm_falcon_fw *fw, u32 *sig_base_src)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.c
98
struct nvkm_falcon_fw fw = {
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
225
gm200_acr_hsfw_load_bld(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
282
gm200_acr_load_setup(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.c
49
gm20b_acr_hsfw_load_bld(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.c
70
gm20b_acr_load_setup(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c
197
gp102_acr_load_setup(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp108.c
29
gp108_acr_hsfw_load_bld(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
58
struct nvkm_falcon_fw fw;
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
88
int gm200_acr_hsfw_load_bld(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
93
int gp102_acr_load_setup(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
98
int gp108_acr_hsfw_load_bld(struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c
174
struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c
225
struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c
262
nvkm_gsp_fwsec_init(struct nvkm_gsp *gsp, struct nvkm_falcon_fw *fw, const char *name, u32 init_cmd)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c
308
nvkm_gsp_fwsec_boot(struct nvkm_gsp *gsp, struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c
351
struct nvkm_falcon_fw fw = {};
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c
89
nvkm_gsp_fwsec_patch(struct nvkm_gsp *gsp, struct nvkm_falcon_fw *fw, u32 if_offset, u32 init_cmd)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c
43
struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c
95
ga102_gsp_fwsec_signature(struct nvkm_falcon_fw *fw, u32 *src_base_src)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h
51
struct nvkm_falcon *, struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h
73
struct nvkm_falcon *, struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h
85
struct nvkm_falcon *, struct nvkm_falcon_fw *);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c
126
tu102_gsp_fwsec_load_bld(struct nvkm_falcon_fw *fw)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c
78
struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)