arch/arm64/include/asm/esr.h

235

#define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \

arch/arm64/include/asm/esr.h

236

(((op0) << ESR_ELx_SYS64_ISS_OP0_SHIFT) | \

arch/arm64/include/asm/sysreg.h

117

#define __SYS_BARRIER_INSN(op0, op1, CRn, CRm, op2, Rt) \

arch/arm64/include/asm/sysreg.h

119

sys_insn((op0), (op1), (CRn), (CRm), (op2)) | \

arch/arm64/include/asm/sysreg.h

40

#define sys_reg(op0, op1, crn, crm, op2) \

arch/arm64/include/asm/sysreg.h

41

(((op0) << Op0_shift) | ((op1) << Op1_shift) | \

arch/arm64/include/uapi/asm/kvm.h

247

#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \

arch/arm64/include/uapi/asm/kvm.h

249

ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \

arch/arm64/include/uapi/asm/kvm.h

545

#define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \

arch/arm64/kvm/emulate-nested.c

2098

op0 = sys_reg_Op0(encoding);

arch/powerpc/include/asm/mpc52xx_psc.h

205

u8 op0; /* PSC + 0x3c */

arch/powerpc/include/asm/mpc52xx_psc.h

346

u8 op0; /* PSC + 0x4c */

arch/powerpc/kernel/trace/ftrace_64_pg.c

396

static bool expected_nop_sequence(void *ip, ppc_inst_t op0, ppc_inst_t op1)

arch/powerpc/kernel/trace/ftrace_64_pg.c

399

return ppc_inst_equal(op0, ppc_inst(PPC_RAW_NOP()));

arch/powerpc/kernel/trace/ftrace_64_pg.c

401

return ppc_inst_equal(op0, ppc_inst(PPC_RAW_BRANCH(8))) &&

arch/powerpc/math-emu/math.c

228

void *op0 = NULL, *op1 = NULL, *op2 = NULL, *op3 = NULL;

arch/powerpc/math-emu/math.c

332

op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);

arch/powerpc/math-emu/math.c

338

op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);

arch/powerpc/math-emu/math.c

344

op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);

arch/powerpc/math-emu/math.c

353

op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);

arch/powerpc/math-emu/math.c

363

op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);

arch/powerpc/math-emu/math.c

368

op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);

arch/powerpc/math-emu/math.c

372

op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);

arch/powerpc/math-emu/math.c

377

op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);

arch/powerpc/math-emu/math.c

383

op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);

arch/powerpc/math-emu/math.c

392

op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);

arch/powerpc/math-emu/math.c

398

op0 = (void *)&regs->ccr;

arch/powerpc/math-emu/math.c

405

op0 = (void *)&regs->ccr;

arch/powerpc/math-emu/math.c

411

op0 = (void *)(long)((insn >> 21) & 0x1f);

arch/powerpc/math-emu/math.c

415

op0 = (void *)(long)((insn >> 23) & 0x7);

arch/powerpc/math-emu/math.c

420

op0 = (void *)(long)((insn >> 17) & 0xff);

arch/powerpc/math-emu/math.c

435

eflag = func(op0, op1, op2, op3);

drivers/infiniband/hw/mthca/mthca_qp.c

1647

u8 op0 = 0;

drivers/infiniband/hw/mthca/mthca_qp.c

1795

op0 = mthca_opcode[wr->opcode];

drivers/infiniband/hw/mthca/mthca_qp.c

1810

qp->send_wqe_offset) | f0 | op0,

drivers/infiniband/hw/mthca/mthca_qp.c

1951

u8 op0 = 0;

drivers/infiniband/hw/mthca/mthca_qp.c

1964

((qp->sq.head & 0xffff) << 8) | f0 | op0;

drivers/infiniband/hw/mthca/mthca_qp.c

2125

op0 = mthca_opcode[wr->opcode];

drivers/infiniband/hw/mthca/mthca_qp.c

2137

dbhi = (nreq << 24) | ((qp->sq.head & 0xffff) << 8) | f0 | op0;

drivers/tty/serial/mpc52xx_uart.c

160

out_8(&PSC(port)->op0, MPC52xx_PSC_OP_RTS);

drivers/tty/serial/mpc52xx_uart.c

933

out_8(&PSC_5125(port)->op0, MPC52xx_PSC_OP_RTS);

scripts/gcc-plugins/randomize_layout_plugin.c

724

const_tree op0;

scripts/gcc-plugins/randomize_layout_plugin.c

785

op0 = TREE_OPERAND(rhs1, 0);

scripts/gcc-plugins/randomize_layout_plugin.c

787

if (op0 == NULL_TREE)

scripts/gcc-plugins/randomize_layout_plugin.c

790

if (TREE_CODE(op0) != VAR_DECL)

scripts/gcc-plugins/randomize_layout_plugin.c

793

op0_type = TYPE_MAIN_VARIANT(strip_array_types(TYPE_MAIN_VARIANT(TREE_TYPE(op0))));

tools/arch/arm64/include/asm/esr.h

217

#define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \

tools/arch/arm64/include/asm/esr.h

218

(((op0) << ESR_ELx_SYS64_ISS_OP0_SHIFT) | \

tools/arch/arm64/include/asm/sysreg.h

39

#define sys_reg(op0, op1, crn, crm, op2) \

tools/arch/arm64/include/asm/sysreg.h

40

(((op0) << Op0_shift) | ((op1) << Op1_shift) | \

tools/arch/arm64/include/uapi/asm/kvm.h

247

#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \

tools/arch/arm64/include/uapi/asm/kvm.h

249

ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \

tools/arch/arm64/include/uapi/asm/kvm.h

545

#define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \

tools/testing/selftests/kvm/arm64/get-reg-list.c

214

unsigned op0, op1, crn, crm, op2;

tools/testing/selftests/kvm/arm64/get-reg-list.c

264

op0 = (id & KVM_REG_ARM64_SYSREG_OP0_MASK) >> KVM_REG_ARM64_SYSREG_OP0_SHIFT;

tools/testing/selftests/kvm/arm64/get-reg-list.c

269

TEST_ASSERT(id == ARM64_SYS_REG(op0, op1, crn, crm, op2),

tools/testing/selftests/kvm/arm64/get-reg-list.c

271

printf("\tARM64_SYS_REG(%d, %d, %d, %d, %d),\n", op0, op1, crn, crm, op2);