drivers/gpu/drm/nouveau/include/nvfw/pmu.h

28

struct nvfw_falcon_msg hdr;

drivers/gpu/drm/nouveau/include/nvfw/sec2.h

17

struct nvfw_falcon_msg hdr;

drivers/gpu/drm/nouveau/include/nvfw/sec2.h

38

struct nvfw_falcon_msg hdr;

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

187

#define nvfw_falcon_cmd nvfw_falcon_msg

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

195

(*nvkm_falcon_qmgr_callback)(void *priv, struct nvfw_falcon_msg *);

drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c

31

nvkm_sec2_finimsg(void *priv, struct nvfw_falcon_msg *hdr)

drivers/gpu/drm/nouveau/nvkm/engine/sec2/ga102.c

75

ga102_sec2_acr_bootstrap_falcon_callback(void *priv, struct nvfw_falcon_msg *hdr)

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

40

gp102_sec2_acr_bootstrap_falcon_callback(void *priv, struct nvfw_falcon_msg *hdr)

drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c

115

nvkm_falcon_msgq_exec(struct nvkm_falcon_msgq *msgq, struct nvfw_falcon_msg *hdr)

drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c

147

struct nvfw_falcon_msg *hdr = (void *)msg_buffer;

drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c

158

struct nvfw_falcon_msg *hdr = data;

drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c

77

nvkm_falcon_msgq_read(struct nvkm_falcon_msgq *msgq, struct nvfw_falcon_msg *hdr)

drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.h

6

#define HDR_SIZE sizeof(struct nvfw_falcon_msg)

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c

125

gm20b_pmu_acr_init_wpr_callback(void *priv, struct nvfw_falcon_msg *hdr)

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c

31

gm20b_pmu_acr_bootstrap_falcon_cb(void *priv, struct nvfw_falcon_msg *hdr)

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c

31

struct nvfw_falcon_msg *hdr)