nv_clk_src_core
cstate->domain[nv_clk_src_core] = perfE.core;
{ nv_clk_src_core , 0xff, 0, "core", 1000 },
case nv_clk_src_core:
struct gt215_clk_info *core = &clk->eng[nv_clk_src_core];
if ((ret = calc_clk(clk, cstate, 0x10, 0x4200, nv_clk_src_core)) ||
struct gt215_clk_info *core = &clk->eng[nv_clk_src_core];
prog_core(clk, nv_clk_src_core);
{ nv_clk_src_core , 0x00, 0, "core", 1000 },
case nv_clk_src_core:
return nvkm_clk_read(&clk->base, nv_clk_src_core);
return nvkm_clk_read(&clk->base, nv_clk_src_core);
return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
const int core = cstate->domain[nv_clk_src_core];
clk->csrc = nv_clk_src_core;
if (clk->csrc == nv_clk_src_core)
clk->ssrc = nv_clk_src_core;
else if (clk->ssrc == nv_clk_src_core)
case nv_clk_src_core:
case nv_clk_src_core:
if (clk->csrc != nv_clk_src_core) {
{ nv_clk_src_core , 0xff, 0, "core", 1000 },
case nv_clk_src_core:
int gclk = cstate->domain[nv_clk_src_core];
{ nv_clk_src_core , 0xff, 0, "core", 1000 },
case nv_clk_src_core:
return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
const int core = cstate->domain[nv_clk_src_core];
{ nv_clk_src_core , 0xff, 0, "core", 1000 },