arch/arm/mach-omap2/display.c

294

v = omap_hwmod_read(oh, DISPC_CONTROL);

arch/arm/mach-omap2/display.c

300

v = omap_hwmod_read(oh, DISPC_CONTROL2);

arch/arm/mach-omap2/display.c

306

v = omap_hwmod_read(oh, DISPC_CONTROL3);

arch/arm/mach-omap2/display.c

341

v = omap_hwmod_read(oh, DISPC_CONTROL);

arch/arm/mach-omap2/display.c

347

v = omap_hwmod_read(oh, DISPC_CONTROL2);

arch/arm/mach-omap2/display.c

354

v = omap_hwmod_read(oh, DISPC_CONTROL3);

arch/arm/mach-omap2/display.c

360

while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) !=

arch/arm/mach-omap2/display.c

399

omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)

arch/arm/mach-omap2/hdq1w.c

46

v = omap_hwmod_read(oh, HDQ_CTRL_STATUS_OFFSET);

arch/arm/mach-omap2/hdq1w.c

51

omap_test_timeout((omap_hwmod_read(oh,

arch/arm/mach-omap2/i2c.c

48

v = omap_hwmod_read(oh, i2c_con);

arch/arm/mach-omap2/i2c.c

56

v = omap_hwmod_read(oh, i2c_con);

arch/arm/mach-omap2/i2c.c

61

omap_test_timeout((omap_hwmod_read(oh,

arch/arm/mach-omap2/msdi.c

59

omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)

arch/arm/mach-omap2/omap_hwmod.c

279

oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);

arch/arm/mach-omap2/omap_hwmod.c

500

omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)

arch/arm/mach-omap2/omap_hwmod.c

505

omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)

arch/arm/mach-omap2/omap_hwmod.h

637

u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);

arch/arm/mach-omap2/wd_timer.c

85

omap_test_timeout((omap_hwmod_read(oh,