drivers/gpu/drm/nouveau/dispnv04/crtc.c

125

struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/crtc.c

241

struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/crtc.c

466

struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/crtc.c

467

struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/crtc.c

57

crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

67

struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/crtc.c

676

struct nv04_crtc_reg *crtc_state = &state->crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/crtc.c

678

struct nv04_crtc_reg *crtc_saved = &saved->crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/crtc.c

82

struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/crtc.c

845

struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/cursor.c

31

crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index)

drivers/gpu/drm/nouveau/dispnv04/cursor.c

42

struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/dfp.c

251

struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg;

drivers/gpu/drm/nouveau/dispnv04/dfp.c

288

struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/dfp.c

289

struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/dfp.c

95

struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg;

drivers/gpu/drm/nouveau/dispnv04/disp.h

78

struct nv04_crtc_reg crtc_reg[2];

drivers/gpu/drm/nouveau/dispnv04/hw.c

380

struct nv04_crtc_reg *crtcstate, int index)

drivers/gpu/drm/nouveau/dispnv04/hw.c

387

struct nv04_crtc_reg *crtcstate, int index)

drivers/gpu/drm/nouveau/dispnv04/hw.c

397

struct nv04_crtc_reg *regp = &state->crtc_reg[head];

drivers/gpu/drm/nouveau/dispnv04/hw.c

473

struct nv04_crtc_reg *regp = &state->crtc_reg[head];

drivers/gpu/drm/nouveau/dispnv04/hw.c

543

struct nv04_crtc_reg *regp = &state->crtc_reg[head];

drivers/gpu/drm/nouveau/dispnv04/hw.c

567

struct nv04_crtc_reg *regp = &state->crtc_reg[head];

drivers/gpu/drm/nouveau/dispnv04/hw.c

594

struct nv04_crtc_reg *regp = &state->crtc_reg[head];

drivers/gpu/drm/nouveau/dispnv04/hw.c

670

struct nv04_crtc_reg *regp = &state->crtc_reg[head];

drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c

546

struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head];

drivers/gpu/drm/nouveau/dispnv04/tvnv04.c

107

struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head];

drivers/gpu/drm/nouveau/dispnv04/tvnv04.c

146

struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

471

struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head];