Symbol: omap3_dpll4_set_rate_and_parent
drivers/clk/ti/clock.h
290
int omap3_dpll4_set_rate_and_parent(struct clk_hw *hw, unsigned long rate,
drivers/clk/ti/dpll.c
123
.set_rate_and_parent = &omap3_dpll4_set_rate_and_parent,