omap2_prm_rmw_mod_reg_bits
omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
omap2_prm_rmw_mod_reg_bits(OMAP_LOGICRETSTATE_MASK, v, pwrdm->prcm_offs,
omap2_prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL);
omap2_prm_rmw_mod_reg_bits(0xffffffff, st, prm_mod, OMAP2_RM_RSTST);
omap2_prm_rmw_mod_reg_bits(rst, 0, prm_mod, OMAP2_RM_RSTCTRL);
return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx);
return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx);
return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset);
omap2_prm_rmw_mod_reg_bits(OMAP_AUTOEXTCLKMODE_MASK,
omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
return omap2_prm_rmw_mod_reg_bits(0,
return omap2_prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,