ohci_readl
(void) ohci_readl (ohci, &ohci->regs->control);
rh_a = ohci_readl(ohci, &ohci->regs->roothub.a);
temp = ohci_readl (controller, ®s->revision) & 0xff;
temp = ohci_readl (controller, ®s->control);
temp = ohci_readl (controller, ®s->cmdstatus);
ohci_readl (controller, ®s->intrstatus),
ohci_readl (controller, ®s->intrenable),
ohci_readl (controller, ®s->ed_periodcurrent),
ohci_readl (controller, ®s->ed_controlhead),
ohci_readl (controller, ®s->ed_controlcurrent),
ohci_readl (controller, ®s->ed_bulkhead),
ohci_readl (controller, ®s->ed_bulkcurrent),
ohci_readl (controller, ®s->donehead), next, size);
rdata = ohci_readl (ohci, ®s->fminterval);
rdata = ohci_readl (ohci, ®s->fmremaining);
rdata = ohci_readl (ohci, ®s->periodicstart);
rdata = ohci_readl (ohci, ®s->lsthresh);
(void)ohci_readl(ohci, &ohci->regs->intrdisable);
ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
ohci_readl(ohci, &ohci->regs->intrenable);
ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
ohci_readl(ohci, &ohci->regs->cmdstatus); /* flush the writes */
if (!no_handshake && ohci_readl (ohci,
while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
val = ohci_readl (ohci, &ohci->regs->fminterval);
(void) ohci_readl (ohci, &ohci->regs->control);
while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
(void) ohci_readl (ohci, &ohci->regs->control);
if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
|| !ohci_readl (ohci, &ohci->regs->periodicstart)) {
ohci_readl (ohci, &ohci->regs->fminterval),
ohci_readl (ohci, &ohci->regs->periodicstart));
(void) ohci_readl (ohci, &ohci->regs->control);
status = ohci_readl(ohci, &ohci->regs->intrstatus);
ohci->prev_donehead = ohci_readl(ohci,
ints = ohci_readl(ohci, ®s->intrstatus);
ints &= ohci_readl(ohci, ®s->intrenable);
(void) ohci_readl (ohci, &ohci->regs->control);
ints = ohci_readl(ohci, ®s->intrstatus);
if (ints && (ints & ohci_readl(ohci, ®s->intrenable)))
temp = ohci_readl(ohci, portstat);
(void) ohci_readl (ohci, &ohci->regs->control);
ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
(void) ohci_readl (ohci, &ohci->regs->control);
temp = ohci_readl (ohci, &ohci->regs->control);
(void) ohci_readl (ohci, &ohci->regs->control);
(void) ohci_readl (ohci, &ohci->regs->control);
(void) ohci_readl (ohci, &ohci->regs->control);
rhsc_enable = ohci_readl(ohci, &ohci->regs->intrenable) &
if (ohci_readl(ohci, &ohci->regs->intrenable) & OHCI_INTR_RHSC)
ohci_readl (ohci, &ohci->regs->roothub.a) & RH_A_NDP);
rhsc_status = ohci_readl(ohci, &ohci->regs->intrstatus) &
ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
status = ohci_readl(ohci, &ohci->regs->roothub.portstatus [port]);
(void) ohci_readl (ohci, &ohci->regs->control);
u16 now = ohci_readl(ohci, &ohci->regs->fmnumber);
temp = ohci_readl (ohci, portstat);
now = ohci_readl(ohci, &ohci->regs->fmnumber);
ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
(void) ohci_readl (ohci, &ohci->regs->control);
u32 fit = ohci_readl(ohci, &ohci->regs->fminterval) & FIT;
u32 temp = ohci_readl (hc, &hc->regs->roothub.register); \
temp = ohci_readl (hc, &hc->regs->roothub.register); \
{ return ohci_readl (hc, &hc->regs->roothub.b); }
{ return ohci_readl (hc, &hc->regs->roothub.status); }