of_read_number
*ret = of_read_number(cache_size, 1);
*ret = of_read_number(line_size, 1);
*ret = of_read_number(nr_sets, 1);
base = of_read_number(prop + (i * 4) + 0, 2);
size = of_read_number(prop + (i * 4) + 2, 2);
base = of_read_number(&addrp[2], 1);
u32 addr = of_read_number(regs, 1);
pdn->vendor_id = regs ? of_read_number(regs, 1) : 0;
pdn->device_id = regs ? of_read_number(regs, 1) : 0;
pdn->class_code = regs ? of_read_number(regs, 1) : 0;
pdn->pci_ext_config_space = (type && of_read_number(type, 1) == 1);
class = of_read_number(classp, 1);
flags = pci_parse_of_flags(of_read_number(addrs, 1), 0);
base = of_read_number(&addrs[1], 2);
size = of_read_number(&addrs[3], 2);
i = of_read_number(addrs, 1) & 0xff;
of_read_number(busrange, 1));
of_read_number(busrange, 1));
return of_read_number(prop, 1);
pci_bus_insert_busn_res(bus, of_read_number(busrange, 1),
of_read_number(busrange+1, 1));
flags = pci_parse_of_flags(of_read_number(ranges, 1), 1);
size = of_read_number(&ranges[6], 2);
region.start = of_read_number(&ranges[1], 2);
devfn = (of_read_number(reg, 1) >> 8) & 0xff;
base = of_read_number(prop + (i * 4) + 0, 2);
size = of_read_number(prop + (i * 4) + 2, 2);
*busno = of_read_number(dma_window, 1);
cells = prop ? of_read_number(prop, 1) : of_n_addr_cells(dn);
*phys = of_read_number(dma_window, cells);
cells = prop ? of_read_number(prop, 1) : of_n_size_cells(dn);
*size = of_read_number(dma_window, cells);
base = of_read_number(prop + (i * cells), n_mem_addr_cells);
size = of_read_number(prop + (i * cells) + n_mem_addr_cells,
size += of_read_number(prop + 2, 2);
size += of_read_number(prop + (i * 4) + 2, 2);
lmb->base_addr = of_read_number(p, n_root_addr_cells);
lmb->drc_index = of_read_number(p++, 1);
lmb->aa_index = of_read_number(p++, 1);
lmb->flags = of_read_number(p++, 1);
n_lmbs = of_read_number(prop++, 1);
dr_cell->seq_lmbs = of_read_number(p++, 1);
dr_cell->base_addr = of_read_number(p, n_root_addr_cells);
dr_cell->drc_index = of_read_number(p++, 1);
dr_cell->aa_index = of_read_number(p++, 1);
dr_cell->flags = of_read_number(p++, 1);
lmb_sets = of_read_number(prop++, 1);
drmem_info->lmb_size = of_read_number(prop, n_root_size_cells);
drmem_info->n_lmbs = of_read_number(prop++, 1);
lmb_sets = of_read_number(prop++, 1);
*block_size = of_read_number(prop, dt_root_size_cells);
start = of_read_number(prop, len / 4);
end = of_read_number(prop, len / 4);
max_nodes = of_read_number(&domains[primary_domain_index], 1);
index = of_read_number(associativity, 1);
return of_read_number(&associativity[index - 1], 1);
nid = of_read_number(&associativity[index], 1);
int array_sz = of_read_number(associativity, 1);
distance_lookup_table[nid][i] = of_read_number(entry, 1);
array_sz = of_read_number(associativity, 1);
max_numa_index = of_read_number(&numa_lookup_index[0], 1);
form2_distances_length = of_read_number((const __be32 *)&form2_distances[0], 1);
numa_id_index_table[i] = of_read_number(&numa_lookup_index[i + 1], 1);
index = of_read_number(&distance_ref_points[1], 1);
index = of_read_number(distance_ref_points, 1);
result = (result << 32) | of_read_number(*buf, 1);
aa->n_arrays = of_read_number(prop++, 1);
aa->array_sz = of_read_number(prop++, 1);
openpic_addr = of_read_number(opprop, naddr);
base = of_read_number(prop + (i * 4) + 0, 2);
end += of_read_number(prop + (i * 4) + 2, 2);
range_addr = of_read_number(addrp, 2);
opal.base = of_read_number(basep, basesz/4);
opal.entry = of_read_number(entryp, entrysz/4);
opal.size = of_read_number(sizep, runtimesz/4);
of_read_number(prop + (i * 5) + 0, 2);
of_read_number(prop + (i * 5) + 2, 1);
of_read_number(prop + (i * 5) + 3, 2);
res->end = res->start + of_read_number(r + 4, 2) - 1;
pci_addr = of_read_number(r, 2);
max_config_vfs = of_read_number(&max_vfs[0], 1);
u32 type = (u32)of_read_number(sections, 1);
num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
ret = of_read_number(&indexes[i], 2);
ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
base = of_read_number(&indexes[i], 2);
size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
res->flags = pci_parse_of_flags(of_read_number
num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
base = of_read_number(&indexes[i], 2);
size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
unit_address = of_read_number(prop, 1);
viodev->resource_id = of_read_number(prop, 1);
(uint32_t)of_read_number(prop, 1));
*indx = of_read_number(ireg, 1);
num_servers = of_read_number(ireg + 1, 1);
offset = of_read_number(reg, a_cells);
size = of_read_number(reg + a_cells, s_cells);
u64 offset = of_read_number(reg, a_cells) / SECTOR_SIZE;
u64 size = of_read_number(reg + a_cells, s_cells) / SECTOR_SIZE;
const unsigned int maxsglen = of_read_number(prop->value, 1);
start = of_read_number(reg, aw);
size = of_read_number(reg, sw);
bank = of_read_number(prop, 1);
bank = of_read_number(prop, 1);
parts[i].offset = of_read_number(reg, a_cells);
parts[i].size = of_read_number(reg + a_cells, s_cells);
offset = of_read_number(addr, na);
return of_read_number(addr, na);
u64 result = of_read_number(addr + 1, na - 1);
cp = of_read_number(range + fna, na - fna);
s = of_read_number(range + na + pna, ns);
da = of_read_number(addr + fna, na - fna);
size = of_read_number(prop + na, ns);
u64 a = of_read_number(addr, na);
*size = of_read_number(prop + na, ns);
*addr = of_read_number(prop, of_n_addr_cells(np));
range->bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na);
range->parent_bus_addr = of_read_number(parser->range + na, parser->pna);
range->size = of_read_number(parser->range + parser->pna + na, ns);
bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na);
return of_read_number(addr, 1);
size = of_read_number(parser->range + parser->pna + na, ns);
return of_read_number(cell, ac);
hwid = of_read_number(cell, ac);
return of_read_number(p, s);
start = of_read_number(prop, len/4);
end = of_read_number(prop, len/4);
offset = of_read_number(addr, na);
result = of_read_number(addr, na);
cp = of_read_number(range, na);
s = of_read_number(range + na + pna, ns);
da = of_read_number(addr, na);
u64 a = of_read_number(addr, na);
*addr = of_read_number(prop, addr_cells);
*size = of_read_number(prop + 4 * addr_cells, size_cells);
tmp_start = of_read_number(prop, len / 4);
tmp_end = of_read_number(prop, len / 4);
nodea = of_read_number(matrix, 1);
nodeb = of_read_number(matrix, 1);
distance = of_read_number(matrix, 1);
*out_value = of_read_number(val, 2);
*out_values++ = of_read_number(val, 2);
partition_number = of_read_number(p_number_ptr, 1);
partition_number = of_read_number(num, 1);
val = of_read_number(calibration, 1);
val = of_read_number(calibration + 1, 1);
hvterm_priv0.termno = of_read_number(termno, 1);
return of_read_number(cell, size);
priv->ec_shm_addr = of_read_number(regaddr_p, 2);