CNIC_WR
CNIC_WR(dev, BAR_TSTRORM_INTMEM +
CNIC_WR(dev, BAR_TSTRORM_INTMEM +
CNIC_WR(dev, BAR_USTRORM_INTMEM +
CNIC_WR(dev, BAR_USTRORM_INTMEM +
CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
CNIC_WR(dev, BAR_XSTRORM_INTMEM +
CNIC_WR(dev, BAR_XSTRORM_INTMEM +
CNIC_WR(dev, BAR_XSTRORM_INTMEM +
CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
CNIC_WR(dev, BNX2_HC_COMMAND,
CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
CNIC_WR(dev, coal_reg, coal_val);
CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
CNIC_WR(dev, BNX2_MQ_CONFIG, val);
CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
CNIC_WR(dev, BAR_CSTRORM_INTMEM +
CNIC_WR(dev, BAR_CSTRORM_INTMEM +
CNIC_WR(dev, BAR_CSTRORM_INTMEM +
CNIC_WR(dev, BAR_CSTRORM_INTMEM +
CNIC_WR(dev, BAR_CSTRORM_INTMEM +
CNIC_WR(dev, BAR_USTRORM_INTMEM +
CNIC_WR(dev, BAR_USTRORM_INTMEM +
CNIC_WR(dev, BAR_TSTRORM_INTMEM +
CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
CNIC_WR(dev, BAR_CSTRORM_INTMEM +